IEEE Transactions on Circuits and Systems I: Regular Papers最新文献_第10页

An Ultrahigh-Throughput and FPGA-Compatible TRNG Based on Dynamic Hybrid Metastability and Jitter Entropy Cells 基于动态混合亚稳态和抖动熵单元的超高吞吐量和fpga兼容TRNG

IF 5.2 1区工程技术

IEEE Transactions on Circuits and Systems I: Regular Papers Pub Date : 2025-01-10 DOI: 10.1109/TCSI.2025.3526181

Junjun Wang;Zhao Huang;Yin Chen;Jinhui Liu;Lirong ZHou;Xiaohong Jiang;Jia Zhou;Quan Wang

{"title":"An Ultrahigh-Throughput and FPGA-Compatible TRNG Based on Dynamic Hybrid Metastability and Jitter Entropy Cells","authors":"Junjun Wang;Zhao Huang;Yin Chen;Jinhui Liu;Lirong ZHou;Xiaohong Jiang;Jia Zhou;Quan Wang","doi":"10.1109/TCSI.2025.3526181","DOIUrl":"https://doi.org/10.1109/TCSI.2025.3526181","url":null,"abstract":"The entropy source is the most critical component of a true random number generator (TRNG), which determines the quality of the random numbers. Current TRNGs mainly utilize a specific source of physical randomness as the entropy source, but it is difficult for this method to achieve a balance between low resource overhead and high throughput. This paper explores the self-feedback multiplexer (SFMUX) structure to obtain a novel dynamic hybrid entropy source for TRNGs. Unlike other MUX-based entropy source circuits, our SFMUX cross-connects the outputs of four independent high-frequency ring oscillators (ROs) as the input signals of four MUXs, and the output of each MUX is self-fed back to serve as a selection signal. Thus, the SFMUX can not only output jitter, but also update the selection signal rapidly and randomly, which increases the probability that the SFMUX outputs unstable signals. When using a D-flip-flop (DFF) to sample this signal, the DFF may become metastable. Modeling the entropy source shows that connecting 1-stage ROs and 2-stage ROs to each SFMUX can achieve higher minimum entropy than using ROs with other numbers of stages. The proposed TRNG design is implemented on Xilinx Virtex-6, Artix-7 and Kintex-7 FPGAs. The experimental results demonstrate that our TRNG achieves a maximum throughput of 550 Mbps while using only 6 slices, and it passes the NIST, AIS-31 and Dieharder tests without postprocessing.","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":"72 5","pages":"2202-2215"},"PeriodicalIF":5.2,"publicationDate":"2025-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143888388","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Modeling and Predicting Noise-Induced Failure Rates in Ultra-Low-Voltage SRAM Bitcells Affected by Process Variations 受工艺变化影响的超低电压SRAM位元噪声诱发故障率建模与预测

IF 5.2 1区工程技术

IEEE Transactions on Circuits and Systems I: Regular Papers Pub Date : 2025-01-10 DOI: 10.1109/TCSI.2024.3525387

Léopold Van Brandt;Michele Bonnin;Mauricio Banaszeski da Silva;Pascal Bolcato;Gilson I. Wirth;Denis Flandre;Jean-Charles Delvenne

{"title":"Modeling and Predicting Noise-Induced Failure Rates in Ultra-Low-Voltage SRAM Bitcells Affected by Process Variations","authors":"Léopold Van Brandt;Michele Bonnin;Mauricio Banaszeski da Silva;Pascal Bolcato;Gilson I. Wirth;Denis Flandre;Jean-Charles Delvenne","doi":"10.1109/TCSI.2024.3525387","DOIUrl":"https://doi.org/10.1109/TCSI.2024.3525387","url":null,"abstract":"Stability of ultra-low-voltage SRAM bitcells in retention mode is threatened by two types of uncertainty: process variability and intrinsic noise. While variability dominates the failure probability, noise-induced bit flips in weakened bitcells lead to dynamic instability. We study both effects jointly in a unified SPICE simulation framework. Starting from a synthetic representation of process variations introduced in a previous work, we identify the cases of poor noise immunity that require thorough noise analyses. Relying on a rigorous and systematic methodology, we simulate them in the time domain so as to emulate a true data retention operation. Short times to failure, unacceptable for a practical ultra-low-power memory system application, are recorded. The transient bit-flip mechanism is analyzed and a dynamic failure criterion involving the unstable steady state is established. We conclude that, beyond static variability, the dynamic noise inflates defectiveness among SRAM bitcells. Then, a stochastic nonlinear model, fully characterizable from conventional deterministic SPICE simulations, is presented. We then leverage it to efficiently and accurately predict the mean time to failure with an analytical Eyring-Kramers formula, recently extended to account for the varying-noise behavior of nonlinear systems.","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":"72 3","pages":"989-1002"},"PeriodicalIF":5.2,"publicationDate":"2025-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143496617","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Detection and Mitigation of nBTI Aging of a High Precision Current Comparator in 16 nm FinFET Technology 16nm FinFET技术中高精度电流比较器nBTI老化的检测与缓解

IF 5.2 1区工程技术

IEEE Transactions on Circuits and Systems I: Regular Papers Pub Date : 2025-01-10 DOI: 10.1109/TCSI.2025.3526099

Hyuk Sun;Paul Wilkins;Steve Rose;Gil Engel

引用次数: 0

MBM PUF: A Multi-Bit Memory-Based Physical Unclonable Function MBM PUF：一个基于多比特内存的物理不可克隆函数

IF 5.2 1区工程技术

IEEE Transactions on Circuits and Systems I: Regular Papers Pub Date : 2025-01-10 DOI: 10.1109/TCSI.2025.3526884

Peyman Dehghanzadeh;Soumyajit Mandal;Swarup Bhunia

引用次数: 0

Guest Editorial A New Exciting Year Ahead for TCAS-I 特邀评论：一个新的令人兴奋的一年在前面的TCAS-I

IF 5.2 1区工程技术

IEEE Transactions on Circuits and Systems I: Regular Papers Pub Date : 2025-01-09 DOI: 10.1109/TCSI.2024.3507472

José M. De La Rosa

引用次数: 0

IEEE Transactions on Circuits and Systems--I: Regular Papers Publication Information IEEE电路与系统汇刊-I：常规论文出版信息

IF 5.2 1区工程技术

IEEE Transactions on Circuits and Systems I: Regular Papers Pub Date : 2025-01-09 DOI: 10.1109/TCSI.2024.3513753

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IEEE Transactions on Circuits and Systems--I: Regular Papers Information for Authors IEEE电路与系统学报-I：作者的常规论文信息

IF 5.2 1区工程技术

IEEE Transactions on Circuits and Systems I: Regular Papers Pub Date : 2025-01-09 DOI: 10.1109/TCSI.2024.3513755

引用次数: 0

IEEE Circuits and Systems Society Information IEEE电路与系统学会信息

IF 5.2 1区工程技术

IEEE Transactions on Circuits and Systems I: Regular Papers Pub Date : 2025-01-09 DOI: 10.1109/TCSI.2024.3513757

引用次数: 0

Fault Tolerant Observer Design for a Class of Re-Entrant Manufacturing Systems 一类可重入制造系统的容错观测器设计

IF 5.2 1区工程技术

IEEE Transactions on Circuits and Systems I: Regular Papers Pub Date : 2025-01-09 DOI: 10.1109/TCSI.2024.3514674

Hao Sun;Qing Gao;Jianbin Qiu;Steven X. Ding;Jinhu Lü

{"title":"Fault Tolerant Observer Design for a Class of Re-Entrant Manufacturing Systems","authors":"Hao Sun;Qing Gao;Jianbin Qiu;Steven X. Ding;Jinhu Lü","doi":"10.1109/TCSI.2024.3514674","DOIUrl":"https://doi.org/10.1109/TCSI.2024.3514674","url":null,"abstract":"This paper investigates the fault-tolerant observer design problem for a class of re-entrant manufacturing systems (RMSs) in the presence of workstation faults during the production process. A hyperbolic hybrid partial differential equation (HHPDE) continuum model is constructed to describe the dynamics of RMSs suffering from unexpected workstation faults, by considering that machinery failures of workstations lead to discarding of defective products. In the case that the faults are known, a fault-tolerant impulsive observer is designed for state estimation of the RMSs. In the case that the fault information is uncertain, a diagnostic observer based residual evaluation logic is developed for fault detection first. Upon detecting the faults, an adaptive impulsive observer is then proposed to simultaneously estimate both the system states and the faults. In addition, by using a piecewise Lyapunov function candidate, sufficient stability conditions that guarantee the exponential input-to-state stability (EISS) of the estimation error are formulated in terms of linear matrix inequalities (LMIs). Finally, the feasibility and effectiveness of the proposed strategy are validated through numerical simulations.","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":"72 4","pages":"1773-1786"},"PeriodicalIF":5.2,"publicationDate":"2025-01-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143726355","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Accurate Hardware Predictor for Epileptic Seizure 癫痫发作的准确硬件预测器

IF 5.2 1区工程技术

IEEE Transactions on Circuits and Systems I: Regular Papers Pub Date : 2025-01-08 DOI: 10.1109/TCSI.2024.3524513

Kasem Khalil;Ashok Kumar;Magdy Bayoumi

{"title":"Accurate Hardware Predictor for Epileptic Seizure","authors":"Kasem Khalil;Ashok Kumar;Magdy Bayoumi","doi":"10.1109/TCSI.2024.3524513","DOIUrl":"https://doi.org/10.1109/TCSI.2024.3524513","url":null,"abstract":"Epilepsy triggers seizures, which develop before clinical onset in patients, and a timely and accurate prediction can save lives. A research challenge is to design accurate, fast, and energy-efficient hardware predictors. This work advances hardware-based seizure prediction research by proposing a new machine-learning-based predictor. It proposes a novel reconfigurable electroencephalogram (EEG) signal segmentation for increased learning. The proposed reconfigurable segmentation adaptively adjusts the overlap extent between consecutive segments and prepares new segments. Such prepared segments are fed into a Convolutional Auto-Encoder (CAE) using a proposed convolution module. The proposed convolution module uses optimized hyperparameters, including the number of layers, filters, filter size, pooling method, stride value, and padding for high learning and feature extraction. The learned CAE feeds into an Economic Long Short-Term Memory (ELSTM) to attain the final prediction result. The proposed predictor achieves high accuracy by exploiting the temporal dynamics of epileptic activity. It predicts seizures with an accuracy of 99.32%, a sensitivity of 99.29%, and a false alarm rate of 0.003 per hour, yielding high performance across classification thresholds, incurring low costs, and outperforming related hardware solutions. It is implemented in stand-alone VHDL, Altera Arria 10 GX FPGA, and synthesized into 45-nm technology.","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":"72 5","pages":"2153-2166"},"PeriodicalIF":5.2,"publicationDate":"2025-01-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143888315","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0