{"title":"First Demonstration of Power-Linear Regulator for Thermo-Optic Phase Tuning","authors":"Yuhang Wang;Da Ming;Xiaofei Chen;Bing Li;Min Tan","doi":"10.1109/TCSI.2025.3549722","DOIUrl":null,"url":null,"abstract":"This paper presents a power-linear regulator (PLR) using a voltage-squaring feedback loop designed for linear thermo-optic tuning. Nonlinear phase tuning occurs when conventional digital-to-analog converters (DACs) or low-dropout regulators (LDOs) are used to drive the thermo-optic phase shifter since the introduced phase change is proportional to the square of the voltage. The nonlinear phase tuning introduces the distortion and non-uniform resolution which degrades the system performance. We propose a PLR to achieve linear thermo-optic phase tuning, where the phase change is proportional to the input voltage. By adopting a voltage-squaring feedback loop, the output voltage is proportional to the square-root of the input voltage under fixed resistive heater and a linear mapping between the input voltage and phase change is established. This design is fabricated in a standard CMOS 65 nm process with an active area of 0.014 mm2. Under 2.5 V supply voltage, the proposed design achieves an input range of <inline-formula> <tex-math>$0\\sim 1$ </tex-math></inline-formula> V and corresponding output range of <inline-formula> <tex-math>$0\\sim 2$ </tex-math></inline-formula> V. The maximum delivered power is up to 40 mW while driving a <inline-formula> <tex-math>$100~\\Omega $ </tex-math></inline-formula> load. The measured power linearity error is <inline-formula> <tex-math>$3.5~\\%$ </tex-math></inline-formula>. Additionally, the design demonstrates rapid transient behavior under a <inline-formula> <tex-math>$100~\\Omega $ </tex-math></inline-formula> load, with <inline-formula> <tex-math>$0.2~\\mu $ </tex-math></inline-formula>s rise time and <inline-formula> <tex-math>$0.7~\\mu $ </tex-math></inline-formula>s fall time between 0 mW output power and 40 mW output power. The line regulation is 6 mV/V under <inline-formula> <tex-math>$100~\\Omega $ </tex-math></inline-formula> load. To the best of our knowledge, it is the first PLR demonstrated in the literature.","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":"72 5","pages":"2039-2047"},"PeriodicalIF":5.2000,"publicationDate":"2025-03-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Circuits and Systems I: Regular Papers","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10931148/","RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q1","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
This paper presents a power-linear regulator (PLR) using a voltage-squaring feedback loop designed for linear thermo-optic tuning. Nonlinear phase tuning occurs when conventional digital-to-analog converters (DACs) or low-dropout regulators (LDOs) are used to drive the thermo-optic phase shifter since the introduced phase change is proportional to the square of the voltage. The nonlinear phase tuning introduces the distortion and non-uniform resolution which degrades the system performance. We propose a PLR to achieve linear thermo-optic phase tuning, where the phase change is proportional to the input voltage. By adopting a voltage-squaring feedback loop, the output voltage is proportional to the square-root of the input voltage under fixed resistive heater and a linear mapping between the input voltage and phase change is established. This design is fabricated in a standard CMOS 65 nm process with an active area of 0.014 mm2. Under 2.5 V supply voltage, the proposed design achieves an input range of $0\sim 1$ V and corresponding output range of $0\sim 2$ V. The maximum delivered power is up to 40 mW while driving a $100~\Omega $ load. The measured power linearity error is $3.5~\%$ . Additionally, the design demonstrates rapid transient behavior under a $100~\Omega $ load, with $0.2~\mu $ s rise time and $0.7~\mu $ s fall time between 0 mW output power and 40 mW output power. The line regulation is 6 mV/V under $100~\Omega $ load. To the best of our knowledge, it is the first PLR demonstrated in the literature.
期刊介绍:
TCAS I publishes regular papers in the field specified by the theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing. Included is the whole spectrum from basic scientific theory to industrial applications. The field of interest covered includes: - Circuits: Analog, Digital and Mixed Signal Circuits and Systems - Nonlinear Circuits and Systems, Integrated Sensors, MEMS and Systems on Chip, Nanoscale Circuits and Systems, Optoelectronic - Circuits and Systems, Power Electronics and Systems - Software for Analog-and-Logic Circuits and Systems - Control aspects of Circuits and Systems.