IEEE Transactions on Circuits and Systems I: Regular Papers最新文献

{"title":"IEEE Transactions on Circuits and Systems--I: Regular Papers Information for Authors","authors":"","doi":"10.1109/TCSI.2025.3588371","DOIUrl":"https://doi.org/10.1109/TCSI.2025.3588371","url":null,"abstract":"","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":"72 8","pages":"4403-4403"},"PeriodicalIF":5.2,"publicationDate":"2025-07-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11099067","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144725268","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"IEEE Circuits and Systems Society Information","authors":"","doi":"10.1109/TCSI.2025.3580927","DOIUrl":"https://doi.org/10.1109/TCSI.2025.3580927","url":null,"abstract":"","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":"72 7","pages":"C3-C3"},"PeriodicalIF":5.2,"publicationDate":"2025-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11061260","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144557860","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"IEEE Transactions on Circuits and Systems--I: Regular Papers Information for Authors","authors":"","doi":"10.1109/TCSI.2025.3580925","DOIUrl":"https://doi.org/10.1109/TCSI.2025.3580925","url":null,"abstract":"","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":"72 7","pages":"3729-3729"},"PeriodicalIF":5.2,"publicationDate":"2025-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11061258","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144557769","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Proportional-Integral and Nonlinear Cubic Control to Enhance Small-Signal and Transient Stability of EV Charging Station and DC Microgrid","authors":"Xinyi Zhang;Bernardo Severino;Kai Strunz","doi":"10.1109/TCSI.2025.3552636","DOIUrl":"https://doi.org/10.1109/TCSI.2025.3552636","url":null,"abstract":"A proportional-integral (PI) controller in parallel with a nonlinear cubic controller is proposed in order to achieve the objective of addressing both the issues of small-signal and large-signal stability, with the latter also being referred to as transient stability. Within the scope of application and of practical relevance is the enhancement of the region of attraction for which equilibrium states are found for an electric vehicle (EV) charging station while considering constraints. As a main contribution, a methodology for the design of the cubic controller to expand the constrained region of attraction (CROA) through sum-of-squares (SOS) programming is formulated, implemented, and validated. The developed SOS program incorporates the construction of Lyapunov functions, which are employed to estimate the CROA. The optimal coefficient of the cubic controller is obtained by estimating the largest CROA. The integration of the cubic controller enhances the robustness of the EV charging station against large disturbances, while the performance under minor disturbances is dealt with by the accompanying PI controller. As a result, the proposed PI-cubic voltage controller enhances the stability across wide operating ranges including fast charging and in the presence of constant power loads. In general, application also includes DC microgrid stability. Time-domain simulations conducted in Matlab validate the made claims. During the considered outage of local power generation on the DC side of the charging station and microgrid, transient stability was only maintained with the proposed controller, and an overcurrent situation was avoided. The PI-cubic controller is shown to be effective in enhancing robustness.","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":"72 7","pages":"3669-3682"},"PeriodicalIF":5.2,"publicationDate":"2025-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11061814","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144557584","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"IEEE Transactions on Circuits and Systems--I: Regular Papers Publication Information","authors":"","doi":"10.1109/TCSI.2025.3580929","DOIUrl":"https://doi.org/10.1109/TCSI.2025.3580929","url":null,"abstract":"","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":"72 7","pages":"C2-C2"},"PeriodicalIF":5.2,"publicationDate":"2025-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11061259","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144536686","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"UniDec: A Unified Factor-Graph-Based Decoder Fully Compatible With 5G NR LDPC/Polar Codes","authors":"Houren Ji;Yi Zhang;Yutai Sun;Yongming Huang;Xiaohu You;Chuan Zhang","doi":"10.1109/TCSI.2025.3575534","DOIUrl":"https://doi.org/10.1109/TCSI.2025.3575534","url":null,"abstract":"In comparison to 4G, 5G wireless needs to support a broader range of applications. Therefore, both low-density parity-check (LDPC) codes and polar codes have been standardized by 5G new radio (NR) to fulfill the requirements of data channel and control channel, respectively. Usually, LDPC/polar decodings are implemented by separate hardware, leading to low area efficiency. Though decoders which can handle both codes have been proposed, how to compromise between throughput and efficiency has always been a persistent dilemma due to the absence of a unified and smooth integration methodology. To this end, by fully utilizing the common parts of graph-theoretic algorithms for both codes, this paper presents a unified decoder (UniDec) which is fully compatible with 5G NR LDPC/polar codes. This UniDec enables three key approaches: <italic>1) unified processing nodes for both codes</i>, <italic>2) configurable permutation networks with multi-parallelism</i>, and <italic>3) flexible scheduling for 5G NR parameter configuration</i>, guaranteeing both high data throughput and area efficiency. Implemented in 40nm CMOS, the UniDec attains a maximum of <inline-formula> <tex-math>$33.64times $ </tex-math></inline-formula> throughput and <inline-formula> <tex-math>$5.98times $ </tex-math></inline-formula> area efficiency compared to its multi-mode counterparts. Even compared with the state-of-the-art (SOA) dedicated ones, the UniDec still maintains a competitive edge in terms of throughput, energy, and area efficiency. It is noted that this methodology can be generalized to other factor-graph based signal processing algorithms.","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":"72 8","pages":"4235-4247"},"PeriodicalIF":5.2,"publicationDate":"2025-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144739910","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A Low-Latency, Highly-Pipelined Hardware Architecture for H.266/VVC Dependent Quantization","authors":"Jun Zhang;Weizhi Bian;Hao Zhang","doi":"10.1109/TCSI.2025.3575567","DOIUrl":"https://doi.org/10.1109/TCSI.2025.3575567","url":null,"abstract":"In comparison to H.265/HEVC, H.266/VVC introduces a novel quantization tool—dependent quantization, which significantly reduces the rate while maintaining the same video quality. However, due to the quantization process of the transform coefficients being highly dependent on the quantization results of the preceding coefficients, the computational parallelism is low, making it unsuitable for hardware pipeline processing and difficult to achieve real-time encoding. To enhance parallelism, this paper optimizes the rate estimation algorithm based on dependent quantization and designs a multi-quantization state parallel quantization structure, implementing a pipeline-based dependent quantization hardware architecture. The main contributions of this paper are as follows: 1) A hardware-friendly rate estimation algorithm is proposed for calculating the quantization level rate-distortion cost, eliminating the dependency on context templates. 2) A multi state parallel quantization hardware structure is designed to improve the quantization parallelism. Among the multiple generated quantization paths, the shortest quantization path is output by comparing the cumulative rate-distortion cost. Additionally, two trellis memories are introduced during the quantization level output phase, using a ping-pong operation to maximize the output throughput of the quantization module. 3)An 8-stage pipeline computation architecture is proposed for dependent quantization, and the dependent quantization hardware module is implemented, with a computing performance capable of quantizing one transform coefficient per cycle. Experimental results show that the dependent quantization hardware module designed in this paper achieves a maximum frequency of 276MHz, with encoding average speed reaching <inline-formula> <tex-math>$3840times 2160$ </tex-math></inline-formula>@31.4,83.5,164.5,242.8fps under QP = 22,27,32,37 conditions. In both All Intra and Random Access configurations, the Bjontegaard Delta Bitrate (BDBR) only increases by 0.81% and 0.85% compared to the standard reference software VTM18.0, respectively. Compared to existing hardware quantization schemes, our approach offers outstanding quantization efficiency and quantization speed.","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":"72 8","pages":"4040-4051"},"PeriodicalIF":5.2,"publicationDate":"2025-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144739983","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A 16-Channel Neurostimulation IC With Self-Biased Monopolar Stimulus Drivers and a Multiple-Output Charge-Pump Converter Achieving 25.44-mW/mm2 Power Density in Low-Voltage CMOS","authors":"Pengfei Han;Yi Ding;Dingfu He;Xinqin Guo;Shiyv Wu;Hongming Lyu","doi":"10.1109/TCSI.2025.3562150","DOIUrl":"https://doi.org/10.1109/TCSI.2025.3562150","url":null,"abstract":"Electrical neuromodulation has shown superior therapeutic outcomes compared with pharmacological interventions alone. This work introduces a 16-channel neurostimulation IC featuring transistor-stacked monopolar stimulation drivers in standard CMOS technology. With a self-adaptive biasing scheme, the stimulation driver ensures operational safety across all load conditions under the ±6-V voltage compliance and successfully addresses potential leakage issues in prior work. Each driver features 8-bit current control with <inline-formula> <tex-math>$1~mu $ </tex-math></inline-formula>A resolution. An on-chip charge-pump system generates ±6-V supplies using a novel multiple-output pulse-skipping modulation scheme and achieves a remarkable power density of 25.44 mW/mm² through the systematic optimization of sub-converters. The 16-channel neurostimulation IC is fabricated in a 180-nm standard CMOS technology, occupying a total pad-included area of 3 mm². The compactness and process compatibility of the design demonstrate the potential for enabling next-generation high-channel-count neural interfaces.","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":"72 6","pages":"2556-2565"},"PeriodicalIF":5.2,"publicationDate":"2025-04-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144170925","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Robust Fractional-Order-Based Von Mises Subband Adaptive Filtering for Feedback Cancellation in Hearing Aids","authors":"Vanitha Devi R;Vasundhara","doi":"10.1109/TCSI.2025.3562481","DOIUrl":"https://doi.org/10.1109/TCSI.2025.3562481","url":null,"abstract":"The issue of acoustic feedback poses a consistent challenge in the context of hearing aids since it imposes restrictions on the attainable amplification levels and has the potential to significantly diminish the perceptual audio quality through the generation of whistling sounds. In recent studies, researchers have employed delay-less multiband structured band-wise acoustic feedback alleviation techniques for hearing aids. However, the resilience of this system in the existence of non-Gaussian noise has yet to be thoroughly addressed. To tackle this matter, a robust and new cost function has been introduced based on the modification of the von Mises distribution with a scaling parameter. In addition, fractional lower-order models provide resilience to heavy-tailed distributions, enhanced precision, heightened versatility and suitability for diverse data formats. In light of this viewpoint, a robust fractional order von Mises-based subband acoustic feedback compensation technique is introduced for hearing aids. The method’s efficacy has been evaluated by computer simulations involving speech and music signals at various signal-to-noise ratio (SNR) levels. The evaluation results show 2–3 dB decrease in misalignment and 2–3 dB enhancement in added stable gain in contrast to prior methodologies. Moreover, perceptual evaluation of speech quality and hearing aid speech quality indexes have been improved by <inline-formula> <tex-math>$approx ~2$ </tex-math></inline-formula> % and <inline-formula> <tex-math>$approx ~10$ </tex-math></inline-formula> % respectively as employed with the proposed technique.","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":"72 7","pages":"3436-3449"},"PeriodicalIF":5.2,"publicationDate":"2025-04-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144550436","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"IEEE Transactions on Circuits and Systems--I: Regular Papers Publication Information","authors":"","doi":"10.1109/TCSI.2025.3560163","DOIUrl":"https://doi.org/10.1109/TCSI.2025.3560163","url":null,"abstract":"","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":"72 5","pages":"C2-C2"},"PeriodicalIF":5.2,"publicationDate":"2025-04-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10979813","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143888423","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}