2021 IEEE 51st International Symposium on Multiple-Valued Logic (ISMVL)最新文献

Quantum Motions and Emotions for a Humanoid Robot Actor 类人机器人演员的量子运动和情感

2021 IEEE 51st International Symposium on Multiple-Valued Logic (ISMVL) Pub Date : 2021-05-01 DOI: 10.1109/ISMVL51352.2021.00043

Richard Deng, Yuchen Huang, M. Perkowski

引用次数: 3

Efficient PAM-4 Data Transmission with Closed Eye Using Symbol Distribution Estimation 基于符号分布估计的有效PAM-4闭眼数据传输

2021 IEEE 51st International Symposium on Multiple-Valued Logic (ISMVL) Pub Date : 2021-05-01 DOI: 10.1109/ISMVL51352.2021.00041

Yosuke Iijima, Y. Yuminaka

引用次数: 2

Construction of Ternary Plateaued Functions from Quadratic Forms for Ternary Bent Functions 由三元弯曲函数的二次形式构造三元平台函数

2021 IEEE 51st International Symposium on Multiple-Valued Logic (ISMVL) Pub Date : 2021-05-01 DOI: 10.1109/ISMVL51352.2021.00010

M. Stankovic, C. Moraga, R. Stankovic

引用次数: 0

A Formal Approach to Identifying Hardware Trojans in Cryptographic Hardware 识别加密硬件中硬件木马的形式化方法

2021 IEEE 51st International Symposium on Multiple-Valued Logic (ISMVL) Pub Date : 2021-05-01 DOI: 10.1109/ISMVL51352.2021.00034

Akira Ito, Rei Ueno, N. Homma

{"title":"A Formal Approach to Identifying Hardware Trojans in Cryptographic Hardware","authors":"Akira Ito, Rei Ueno, N. Homma","doi":"10.1109/ISMVL51352.2021.00034","DOIUrl":"https://doi.org/10.1109/ISMVL51352.2021.00034","url":null,"abstract":"This paper presents a new formal method for detecting and identifying hardware Trojans (HTs) inserted into the datapath of cryptographic hardware based on Galois-field arithmetic such as for the Advanced Encryption Standard and elliptic curve cryptography. To detect HTs, our method first performs equivalence checking between the specifications given as Galois-field polynomials (or the reference circuit of cryptographic hardware) and polynomials representing the input-output relations of a gate-level netlist. Our method exploits zero-suppressed binary decision diagrams for efficient verification. Once an HT is found, the proposed method then detects the trigger condition of the HT using the characteristics of zero-suppressed binary decision diagrams. It also identifies the HT localization using a novel computer algebra method. Our experimental results show that the proposed method can verify netlists and identify HT trigger conditions and locations on a 233-bit multiplier commonly used in elliptic curve cryptography within 1.8 seconds. In addition, we show that if the reference circuit is given, the proposed method can detect a realistic HT inserted into the entire Advanced Encryption Standard hardware, including control logic, in approximately three seconds.","PeriodicalId":129346,"journal":{"name":"2021 IEEE 51st International Symposium on Multiple-Valued Logic (ISMVL)","volume":"362 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116368838","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Linear Decompositions for Multi-Valued Input Classification Functions 多值输入分类函数的线性分解

2021 IEEE 51st International Symposium on Multiple-Valued Logic (ISMVL) Pub Date : 2021-05-01 DOI: 10.1109/ISMVL51352.2021.00013

Tsutomu Sasao, J. T. Butler

引用次数: 0

Hereditary rigidity, separation and density: In memory of Professor I.G. Rosenberg 遗传刚性，分离和密度:纪念I.G.罗森伯格教授

2021 IEEE 51st International Symposium on Multiple-Valued Logic (ISMVL) Pub Date : 2021-05-01 DOI: 10.1109/ISMVL51352.2021.00020

L. Haddad, M. Miyakawa, M. Pouzet, H. Tatsumi

{"title":"Hereditary rigidity, separation and density: In memory of Professor I.G. Rosenberg","authors":"L. Haddad, M. Miyakawa, M. Pouzet, H. Tatsumi","doi":"10.1109/ISMVL51352.2021.00020","DOIUrl":"https://doi.org/10.1109/ISMVL51352.2021.00020","url":null,"abstract":"We continue the investigation of systems of hereditarily rigid relations started in Couceiro, Haddad, Pouzet and Schölzel [1]. We observe that on a set <tex>$V$</tex> with <tex>$m$</tex> elements, there is a hereditarily rigid set <tex>$mathcal{R}$</tex> made of <tex>$n$</tex> tournaments if and only if <tex>$m(m-1)leq 2^{n}$</tex>. We ask if the same inequality holds when the tournaments are replaced by linear orders. This problem has an equivalent formulation in terms of separation of linear orders. Let <tex>$h_{text{Lin}}(m)$</tex> be the least cardinal <tex>$n$</tex> such that there is a family <tex>$mathcal{R}$</tex> of <tex>$n$</tex> linear orders on an <tex>$m$</tex>-element set <tex>$V$</tex> such that any two distinct ordered pairs of distinct elements of <tex>$V$</tex> are separated by some member of <tex>$mathcal{R}$</tex>, then <tex>$[log_{2}(m(m-1))]leq h_{text{Lin}}(m)$</tex> with equality if <tex>$mleq 7$</tex>. We ask whether the equality holds for every <tex>$m$</tex>. We prove that <tex>$h_{text{Lin}}(m+1)leq h_{text{Lin}}(m)+1$</tex>. If <tex>$V$</tex> is infinite, we show that <tex>$h_{text{Lin}}(m)=aleph_{0}$</tex> for <tex>$mleq 2^{aleph_{0}}$</tex>. More generally, we prove that the two equalities <tex>$h_{text{Lin}}(m)=log_{2}(m)=d$</tex> (Lin <tex>$(V)$</tex>) hold, where <tex>$log_{2}(m)$</tex> is the least cardinal <tex>$mu$</tex> such that <tex>$mleq 2^{mu}$</tex>, and <tex>$d$</tex> (Lin <tex>$(V)$</tex>) is the topological density of the set Lin (V) of linear orders on <tex>$V$</tex> (viewed as a subset of the power set <tex>$mathcal{P}(Vtimes V)$</tex> equipped with the product topology). These equalities follow from the Generalized Continuum Hypothesis, but we do not know whether they hold without any set theoretical hypothesis.","PeriodicalId":129346,"journal":{"name":"2021 IEEE 51st International Symposium on Multiple-Valued Logic (ISMVL)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128525174","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Synthesis of Asymptotically Optimal Adders for Multiple-Valued Logic 多值逻辑渐近最优加法器的综合

2021 IEEE 51st International Symposium on Multiple-Valued Logic (ISMVL) Pub Date : 2021-05-01 DOI: 10.1109/ISMVL51352.2021.00038

Philipp Niemann, R. Drechsler

引用次数: 2

A High-Throughput Detection Circuit based on 2q+1-Valued Deep Neural Networks 基于2q+1值深度神经网络的高通量检测电路

2021 IEEE 51st International Symposium on Multiple-Valued Logic (ISMVL) Pub Date : 2021-05-01 DOI: 10.1109/ISMVL51352.2021.00032

Naoto Soga, Ryosuke Kuramochi, Hiroki Nakahara

引用次数: 0

An Optimal Design Methodology of Ternary Logic in Iso-device Ternary CMOS 等器件三元CMOS中三元逻辑的优化设计方法

2021 IEEE 51st International Symposium on Multiple-Valued Logic (ISMVL) Pub Date : 2021-05-01 DOI: 10.1109/ISMVL51352.2021.00040

Jonghyun Ko, KwanWoo Park, Suhyeong Yong, Taegam Jeong, Tae-Hoon Kim, Taigon Song

引用次数: 3

On Distinguishing Sequences of Several Classes of Reversible Finite State Machines 几种可逆有限状态机序列的判别

2021 IEEE 51st International Symposium on Multiple-Valued Logic (ISMVL) Pub Date : 2021-05-01 DOI: 10.1109/ISMVL51352.2021.00028

M. Lukac, K. El-Fakih

{"title":"On Distinguishing Sequences of Several Classes of Reversible Finite State Machines","authors":"M. Lukac, K. El-Fakih","doi":"10.1109/ISMVL51352.2021.00028","DOIUrl":"https://doi.org/10.1109/ISMVL51352.2021.00028","url":null,"abstract":"The existence of distinguishing sequence (DS) is an important property for finite state machines (FSMs). Such an input sequence can distinguish all the states of the FSM. An FSM possessing a DS can be therefore easily analyzed in a case of unexpected failure and the state when the machine terminated can be identified. In this paper, we investigate length and existence of DSs of several classes of reversible finite state machines (RFSM). Reversible FSMs can be directly constructed on a quantum computer and therefore understanding their properties is important for the efficient usage and implementation of these devices in quantum technologies. In particular, we consider output balanced machines, where for every input the output assignment is balanced. We also consider output unbalanced machines that have the same output assignment for each input. Finally, we investigate a hierarchy of six classes of such machines. All machines we study in this paper possess a DS exists, unlike some RFSMs that might not have DS. In addition the length of DS of all of these machines is shorter than the general length of DS from [1].","PeriodicalId":129346,"journal":{"name":"2021 IEEE 51st International Symposium on Multiple-Valued Logic (ISMVL)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127793980","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0