{"title":"New mode crack of LSI package in the solder reflow process","authors":"M. Adachi, S. Ohuchi, N. Totsuka","doi":"10.1109/IEMT.1991.279771","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279771","url":null,"abstract":"A new mode crack that could not be explained by a general mechanism has been observed under the condition of the surface mount components being smaller and thinner, and requiring more severe characteristics in the solder reflow process. The mode crack is generated from the upper portion of the die pad corner, and is not caused by the delamination between the die pad and the plastic. This new mode crack mechanism is explained in the following way. Absorbed moisture reaches the die attachment layer during storage and is vaporized by heat in soldering; the vapor pressure pushes down the die pad and causes stress in the plastic of the upper portion of the die pad corner; then new mode cracks are generated. The authors also describe how a new lead frame design can prevent this crack.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129107933","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Guidelines for design of machining processes to eliminate solvent cleaning","authors":"R. Nagarajan","doi":"10.1109/IEMT.1991.279801","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279801","url":null,"abstract":"The author presents rules for the design of the machining/assembly process, particularly for vended parts, to eliminate the need for subsequent solvent-cleaning. These include the replacement of oil-base lubricants, coolants, and lapping vehicles with water-soluble counterparts; implementation of soldering processes that involve water-soluble fluxes, or are flux-free; keeping the parts wet so that dried residues do not form on the surface; and providing for rapid and effective drying after cleaning so that aqueous cleaning can replace CFC (chlorofluorocarbon) cleaning. These guidelines are illustrated with examples from production environments.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"59 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128608674","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Concurrent engineering for consumer, industrial products, and government systems","authors":"L. Keys, R. Rao, K. Balakrishnan","doi":"10.1109/IEMT.1991.279743","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279743","url":null,"abstract":"Recent Institute for Defense Analysis reports, National Science Foundation workshop results, and other current efforts and publications addressing concurrent engineering (CE) are discussed. It is noted that CE has yielded benefits involving reduction in change orders, development time, development costs, inventories, scrap, rework, defects, and production costs.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125990468","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pan Yaohua, Sun Shenliang, Wang Suqing, Chen Shenglei
{"title":"Development of anti-glare coating for high resolution color display tubes","authors":"Pan Yaohua, Sun Shenliang, Wang Suqing, Chen Shenglei","doi":"10.1109/IEMT.1991.279817","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279817","url":null,"abstract":"Research on the development of anti-glare coating material for coating high-resolution display tubes is described. The coating solution that is considered is highly dispersed on the screen of display tubes, thus forming a special coating for anti-glare instead of forming an anti-reflection film. The degrees of hydrolysis and polycondensation of tetraethyl orthosilicate (TEOS) which forms the anti-glare coating on display tubes are closely related to the stability and technological characteristics of the coating solution and the quality of the coating produced. By determining the variations of conductivities, refractive indexes, and viscosities of the coating solution with time, the authors have studied the stability of the technological characteristics of domestic TEOS under various preparation conditions. In addition, by selecting and controlling the ratios of TEOS to acid, water, and alcohol, and selecting and controlling technological conditions, a coating solution with rapid maturity and long stability was produced. By using this coating solution and existing equipment and by inspecting and controlling the process with a convenient and easy-handling method, a high-quality anti-glare coating was achieved.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127479853","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Package warpage evaluation for multi-layer molded PQFP","authors":"B. Kiang, Janice Wittmershaus, R. Kar, N. Sugai","doi":"10.1109/IEMT.1991.279753","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279753","url":null,"abstract":"Finite element analyses (FEAs) together with molding experimentation with various mold chases were conducted to evaluate the mechanisms for package warpage and leadframe deflection of multi-layer PQFP (plastic quad flat pack) packages. The leadframe downset structure is identified as the major factor contributing to the package warpage. It is demonstrated that package warpage can be eliminated by properly tailoring the top and bottom mold cavity depths. The post mold cure, which raises the T/sub g/ of the molding compound, also helps reduce the package warpage. FEA calculations of package warpage at room temperature are in good agreement with experimental data. The leadframe deflection is also due primarily to its downset structure and may be reduced by preheating the leadframe before the encapsulation.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122251684","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"The effect of set management on just-in-time manufacturing","authors":"J. Federico, C. Waddle","doi":"10.1109/IEMT.1991.279762","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279762","url":null,"abstract":"The authors describe the implementation of the set management concept at IBM in Hopewell Junction in 1990. Set management is designed to release a package of layers, which have been combined at the substock crib, into a substrate part number, significantly lowering material handling and inventory levels resulting in improved test yields. In the revolutionized set management approach, layer job release was triggered by a new software system which balanced sets. When completed each layer job was placed directly into the magazine from which it would be released into stocking, eliminating handling steps and kitting. Inventory reduction was immediately visible with inventory levels going from 30-40 days to less than 10 days. Implementation of set management led to a 7% improvement in yield, a 6* reduction in layer inventory, a 3* reduction in crib storage time, and multiple handling and inspection reductions. The savings to IBM amounted to over $12 million. Process change results are now seen on a real-time basis. Software was instituted to do daily inventory checks and ensure that the line is loaded with the correct mix of part numbers to meet the highest measure of serviceability possible.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130794897","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Packaging trends in the 90's","authors":"R. Gedney, T. F. Kelley","doi":"10.1109/IEMT.1991.279807","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279807","url":null,"abstract":"It is pointed out that, as the level of integration increases and system performance rapidly approaches cycle times where packaging delays become important gates, multi-chip modules (MCMs) will become the necessary packaging solution for a growing number of manufacturers. The authors address the need for multi-chip modules, volume projections, and a categorization proposal that can be used to help set the packaging manufacturers' strategic direction that will be consistent with their customers' future direction. It is concluded that, for moderately complex systems, MCMs can provide the manufacturer with a substantial improvement in package density and alleviate complexity at the second level package. MCMs can be divided into categories that define module complexity and I/O density for PCs, workstations and intermediate level computer systems. This should allow the manufacturer to plan for the type of module that best suits the manufacturer's needs.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116121128","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Die and MCM test strategy: the key to MCM manufacturability","authors":"M. Salatino, R. Bracken","doi":"10.1109/IEMT.1991.279833","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279833","url":null,"abstract":"Harris Corporation has undertaken a multi-chip module (MCM) project that will develop a four-channel digital RF receiver for use in very dense, lightweight systems. This MCM is designated the Digital Drop Receiver (DDR). Each channel is comprised of three chips: two digital decimating filters, and a numerically controlled oscillator/modulator. The ICs are interconnected to the MCM substrate by both TAB (tape automated bonding) and gold wire bonding. TAB assembly is used for the VLSI chips in order to be able to pretest these circuits at their maximum operating speed (up to 33 MHz) prior to assembly, substantially reducing die rework. Hypothetical yield models were developed comparing wirebonded, untested die, and TAB'ed, pretested die. The results of these models indicated that a wirebond version could require numerous rework iterations to produce a functional module and be well beyond current MIL STD H-38534 and 1772 rework allowances, not to mention the rework survivability of the MCM substrate. The TAB'ed, pretested model predicted 100% functional modules in two rework cycles.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"86 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123575654","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Modeling of performance-related design trade-offs in multi-chip assemblies","authors":"O. Palusinski, J. H. Hohl","doi":"10.1109/IEMT.1991.279808","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279808","url":null,"abstract":"The authors discuss the need for development of global performance measures for multi-chip microelectronic assemblies and systems. In particular, electrical performance measures of memory assemblies and their dependence on design parameters were studied. Models of pertinent components of electronic systems, such as off-chip drivers and receivers, and chip-to-chip signal transmission lines were used to evaluate essential properties of memory modules. The read access time was selected as a measure of performance of those modules. Using simple modeling this measure is related to basic parameters such as conductor geometry, substrate material thickness and permittivity, I/O pitch in chip carriers and chip access time. The specific memory module considered shows strong dependence of performance measure on materials used in its construction. The relationships between systems performance, materials properties, and geometry are described by analytic approximations; however, more accurate modeling will use look-up tables and specialized computer programs. Development of suitable computer support for system design based on developed models of performance is discussed.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123651704","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A. Emamjomeh, P. Wesling, J. Doong, A. Chi, K. Ling, S. Chiao
{"title":"TAB inner-lead bond process characterization for single-point laser bonding","authors":"A. Emamjomeh, P. Wesling, J. Doong, A. Chi, K. Ling, S. Chiao","doi":"10.1109/IEMT.1991.279738","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279738","url":null,"abstract":"Results are presented for a set of screening experiments used to characterize a process for performing inner-lead bonding (ILB) using a continuous-wave (CW) laser. Three key parameters were selected for initial analysis: the force exerted by the bonding stylus; the laser power; and the on-time of the laser. Using a Box-Behnken statistical design for the experiment, an efficient set of tests was derived. Four sets of experimental samples were fabricated, to be used for the as-fabricated testing, high-temperature aging, and thermal cycling. Only the as-fabricated results are reported here. Using a design-of-experiments software package for the PC, a quadratic equation was derived from the data explicitly defining the relationships among the three parameters and relating them to bond strength. Using the techniques of surface response methodology, a response surface was created, showing the optimum operating region for the ILB process based on the parameter range chosen. The initial screening experiments show that good bond strength occurs in a range of constant energy (power times on-time) for the CW laser bonder; in the range of the three parameters tested, bond strength was optimized at forces of 20 grams, a power of 4.3 W, and laser on-time of 150 ms.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124178757","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}