{"title":"Production management implementation at SEMATECH","authors":"R. Burcham","doi":"10.1109/IEMT.1991.279839","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279839","url":null,"abstract":"The author presents a case study concerning the process of production control system implementation in SEMATECH's advanced integrated circuit manufacturing facility. The unique situation at SEMATECH, which emphasizes leading-edge research and development while running multiple integrated manufacturing processes, provides a worst-case scenario for demonstrating world-class manufacturing. A combination of a manual just-in-time (JIT) system and a computer-aided production control system has proved effective in improving manufacturing performance. This case study documents the phases of the process and the lessons learned during each phase.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124402140","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Are environmental and manufacturing objectives compatible?","authors":"V.A. Nusbaum","doi":"10.1109/IEMT.1991.279794","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279794","url":null,"abstract":"Attempts to show that environmentally-driven design and operational changes can improve products and be good for business. For example, at IBM product yield improvements have resulted from recycling equipment that is also used to purify incoming chemicals. Cleaners using water instead of CFCs (chlorofluorocarbons) produce better parts at lower cost. In addition, chemical source reduction activities are reducing liability and costs associated with waste disposal. One of the keys to efficient operation now and in the future is to design products and manufacturing processes so that chemicals and waste are minimized.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"236 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122959331","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"High-density and very fine-pitch IC packages: a technology assessment","authors":"R. Ray","doi":"10.1109/IEMT.1991.279767","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279767","url":null,"abstract":"To meet the technological challenges of the future in terms of device performance and miniaturization, a number of IC packages have been developed in the industry, with very high levels of integration. The distinguishing features of these packages include high density, small profile, very fine lead spacings, and superior electrical and thermal characteristics. The author provides a comparative assessment of these IC packages, he also discusses various issues posed by these packaging configurations to the surface-mount assembly world. About 25 different packaging formats and their various derivatives are analyzed from a manufacturing perspective. According to this assessment, the Japanese-styled metric quad flat-packs using pre-formed leads and tape automated bonding are emerging as the technology of choice for high density, high I/O, and very fine-pitch packaging.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114077430","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Knowledge-based process planning in surface mount technology","authors":"M. Cala, K. Srihari","doi":"10.1109/IEMT.1991.279785","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279785","url":null,"abstract":"Process planning in printed circuit board (PCB) assembly using surface mount technology is scheduling-intensive. Artificial intelligence based techniques used in computerized planning and scheduling systems in other industries can be extended to PCB operations. These techniques include blackboard architectures, object-oriented programming systems, and nonmonotonic reasoning systems. These techniques have been blended in a unique architecture of blackboard systems that communicate via object-oriented messages to arrive at the set of decisions that constitutes a shop-floor process plan and schedule. The methodology was specialized to the assembly of PCBs using surface mounted components in a high-variety/low-volume product mix. The assembly facility was represented as a hierarchical object of product, process, and organizational knowledge. The integrated process planning and scheduling system that has been developed overcomes the limitations of previous computer-aided process planning systems for electronic assembly.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128316295","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design for manufacturability for electronic design: a system for evaluating printed circuit design tradeoffs","authors":"W. Tani","doi":"10.1109/IEMT.1991.279804","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279804","url":null,"abstract":"A system for evaluating printed circuit design (PCD) tradeoffs during the electronic design process has been developed. The system consists of a stand-alone PC-based software tool and support documentation which describes system operation, content, methodology, optimization processes, and printed circuit technology selection criteria. At any stage of the PCD process, the system can be used to evaluate the advantages and disadvantages of potential board design alternatives. Example design tradeoffs include board cost vs. circuit density, electrical performance vs. cost, and cost vs. manufacturability. All tradeoffs are based on a set of models and metrics which predict board density and technology requirements, board cost, fabrication yield, and expected electrical performance ranges. System models and metrics are based on actual production fabrication capabilities. The system's potential for significantly reducing overall PCD cycle times while simultaneously satisfying overall board design constraints has been demonstrated.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127681719","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Real time process planning for PCB assembly","authors":"J. Cecil, K. Srihari, C. Emerson","doi":"10.1109/IEMT.1991.279786","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279786","url":null,"abstract":"The authors discuss a blackboard-based process planning system for the surface mount assembly of printed circuit boards (PCBs). The developed system has a user interface, two knowledge sources, a blackboard, and an output module. This process planning system takes into consideration some of the real-time changes in the shop floor of a PCB manufacturing facility.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129868078","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Integrated management of development and manufacturing","authors":"S. Chou","doi":"10.1109/IEMT.1991.279755","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279755","url":null,"abstract":"The author describes an integrated management approach in which development and manufacturing activities are carried out in separate environments, but are linked to each other so that developed capabilities can be rapidly replicated for manufacturing purposes. This approach has been successfully applied to wafer fab processes. The author's experiences and his thoughts regarding wider implications are presented.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"2009 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131524688","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Modern bonding processes for large-scale integrated circuits, memory modules and multichip modules in plastic packages","authors":"C. Meisser","doi":"10.1109/IEMT.1991.279751","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279751","url":null,"abstract":"It is noted that the decisive factor for the very high market share held by plastic packages is the much lower material and processing costs of designs based on the leadframe compared with the category of singulated devices. For the lower processing costs there are several reasons: handling of lead-frame can be easily automated, rapid gold ball/wedge wire bonding, and automatic encapsulation of the components. The possibilities and the currently valid process limits of this technology are demonstrated. For the plastic packaging of LSI memory modules, novel assembly processes have been developed by IBM and Hitachi. The concept of a multichip module in a plastic package, based on them, is presented.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129497626","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Employee empowered quality improvement","authors":"M. Cassidy","doi":"10.1109/IEMT.1991.279742","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279742","url":null,"abstract":"Continuous improvement in quality has been made possible by the use of a complete quality program which fully utilizes the knowledge and capabilities of an entire workforce. The program includes formal quality policy deployment, training, a seven-step quality improvement process, and the use of poka-yoke or mistake-proofing devices. It is concluded that employees empowered to create continuous quality improvement have demonstrated that zero defects is an obtainable goal. True empowerment is only achieved by establishing quality policy based on employee involvement, establishing valid indicators, providing training to all employees, and encouraging all employees to use the latest quality improvement and mistake proofing techniques every day.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125107805","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A pilot line for multichip modules substrates","authors":"J. Droguet","doi":"10.1109/IEMT.1991.279829","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279829","url":null,"abstract":"In 1990 Thomson Hybrides started design and installation of a pilot production line for high density thin film substrates. Copper/polyimide multilayer structures are processed on alumina substrates. Vacuum metallization, electroplating, and photolithography processes will be progressively transferred to new automatic equipment. Starting with standard square plates (4\"*4\"), the pilot line has been designed to be compatible with sizes up to 6\"*6\". The industrial approach is explained here. The pilot line is described in relation to the manufacturing cycle and process engineering. How the quality and yield should be affected by automatic processing is discussed.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117086753","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}