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[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium最新文献

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Testability challenges to achieve zero defect goal in MCM manufacturing 在MCM制造中实现零缺陷目标的可测试性挑战
[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium Pub Date : 1991-09-16 DOI: 10.1109/IEMT.1991.279827
D. McQueeney, T. Zittritsch
{"title":"Testability challenges to achieve zero defect goal in MCM manufacturing","authors":"D. McQueeney, T. Zittritsch","doi":"10.1109/IEMT.1991.279827","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279827","url":null,"abstract":"Discusses some approaches to chip test and MCM (multi-chip module) assembly, and describes a module designed for CMOS logic, including details of its chip attach technology, test, and burn-in strategy. It is concluded that test procedures can be more easily implemented if the chips are designed for an MCM environment. Two significant challenges are the use on an MCM of chips whose design did not consider MCM test issues, and modules made up of chips from different manufacturers.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126896309","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Using fuzzy mathematics to detect dimple defects of polished wafer surface 利用模糊数学方法检测抛光晶圆表面的凹陷缺陷
[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium Pub Date : 1991-09-16 DOI: 10.1109/IEMT.1991.279774
J.C. Lin, H. Li, Y. Ji
{"title":"Using fuzzy mathematics to detect dimple defects of polished wafer surface","authors":"J.C. Lin, H. Li, Y. Ji","doi":"10.1109/IEMT.1991.279774","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279774","url":null,"abstract":"Using the concept of fuzzy mathematics, the authors developed an automated visual inspection system to detect dimple defects of polished wafer surfaces. The algorithm consists of two major processing phases. At the first phase, pre-processing is performed to eliminate noise and to reduce the number of potential candidates of dimple defects. At the second phase, four pattern features are defined based on the consideration of scale-, position-, and orientation-invariant. A fuzzy membership function is utilized to cope with the wide range of shape variations of the dimple defects. A decision-making mechanism is based on the value of the membership function which describes the pattern's closeness to a dimple. The attractive features of the system include the fact that the algorithm is distortion-invariant. Experimental results are presented.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125181383","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Bridge-gap buried digit-line for high density stacked DRAMs 高密度堆叠型dram的桥隙埋式数字线
[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium Pub Date : 1991-09-16 DOI: 10.1109/IEMT.1991.279803
H. Rhodes, P.C. Fazan, M.A. Eyolfson, C. Dennison, D. Becker, J.J. Johnson, Y.C. Liu, K.C. Chan, P. Paduano, C. G. Inman, T. Lowrey
{"title":"Bridge-gap buried digit-line for high density stacked DRAMs","authors":"H. Rhodes, P.C. Fazan, M.A. Eyolfson, C. Dennison, D. Becker, J.J. Johnson, Y.C. Liu, K.C. Chan, P. Paduano, C. G. Inman, T. Lowrey","doi":"10.1109/IEMT.1991.279803","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279803","url":null,"abstract":"Explores the interaction of design and process to achieve a manufacturable low digit-line resistance-a key element to DRAM (dynamic random access memory) speed and to minimizing overall process complexity. They propose an interaction between stacked DRAM design and process called the bridge-gap process for achieving low digit-line resistance while minimizing overall process complexity. A study of digit-line resistance as a function of word-line gap and digit-line poly-Si thickness indicates that there is a well-defined, poly-Si dependent forbidden gap which gives rise to high, variable, and even open digit-line resistance. After word-line (n-channel transistor) spacer formation, digit-line buried contact formation, and digit-line poly-Si deposition, this gap partially closes and so presents a deep trench, which the LPCVD (low pressure chemical vapor deposited) WSi/sub x/ cannot adequately cover. For a minimum digit-line poly-Si thickness that can withstand the WSi/sub x/ stress, word-line gaps are designed so that they are either less than (bridged digit-line) or greater than (gapped digit-line) the forbidden gap.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123701636","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Partnering for total quality: an industry's blueprint to regain and retain competitiveness 全面质量合作:行业重获和保持竞争力的蓝图
[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium Pub Date : 1991-09-16 DOI: 10.1109/IEMT.1991.279744
A. Kanagal
{"title":"Partnering for total quality: an industry's blueprint to regain and retain competitiveness","authors":"A. Kanagal","doi":"10.1109/IEMT.1991.279744","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279744","url":null,"abstract":"The author describes a step-by-step process of implementing total quality as a way of life within the semiconductor industry supply-chain. While this process utilizes the Malcolm Baldridge National Quality Award criteria as a foundation, the application of these criteria has been tailored to this industry. In doing so it adds additional dimensions to these criteria by bringing them to the level of understanding of the average individual in an average company within the industry. It also provides useful knowhow information and expands on the partnering process between customers and suppliers that is essential for any company to remain viable within this competitive industry. Some of the lessons that have been learned from SEMATECH's active involvement in deploying the partnering for total quality process across the supply-chain are discussed.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"133 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123393019","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
A numerical study of oxygen precipitation in CZ-silicon: LO-HI and CMOS-type thermal cycles cz -硅:LO-HI和cmos型热循环中氧沉淀的数值研究
[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium Pub Date : 1991-09-16 DOI: 10.1109/IEMT.1991.279759
M. Schrems, G. Hobler, H. Potzl, J. Hage
{"title":"A numerical study of oxygen precipitation in CZ-silicon: LO-HI and CMOS-type thermal cycles","authors":"M. Schrems, G. Hobler, H. Potzl, J. Hage","doi":"10.1109/IEMT.1991.279759","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279759","url":null,"abstract":"Control of oxygen precipitation is important for increasing the yield in ULSI-processing. In the present work, computer modeling is used to investigate the formation of oxygen precipitates during double-step (LO-HI) and multi-step CMOS-type thermal anneals. The calculations agree well with a large number of experimental results. The proposed model is used to investigate the influence of processing parameters such as initial oxygen content, annealing temperature and time, and the thermal history of wafers on the amount of precipitation observed. The model is also used to determine 2-step and 3-step substitutional anneals showing precipitation behavior similar to that of a multi-step CMOS-type anneal. It is concluded that application of the computer model offers the potential of reducing both time and costs for the development of shorter substitutional thermal processes, which are necessary for routine testing of the precipitation behavior of wafers used in multi-step device processing.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131668960","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
An integrated methodology for electronic assembly planning 电子装配规划的综合方法
[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium Pub Date : 1991-09-16 DOI: 10.1109/IEMT.1991.279781
C. Malavé, J. Cecil, W. Hernandez
{"title":"An integrated methodology for electronic assembly planning","authors":"C. Malavé, J. Cecil, W. Hernandez","doi":"10.1109/IEMT.1991.279781","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279781","url":null,"abstract":"The authors discuss an integrated planning, scheduling, and control methodology for electronic assembly. The activities of a placement workstation for electronic assembly are addressed. Placement sequence planning, vision analysis, inspection, and control issues of the developed methodology are discussed. The placement workstation is hierarchically controlled by the electronic manufacturing cell controller. The activities of the flexible placement workstation are performed by the planning/scheduling and control modules. The methodology described has been implemented on ROBOTWORLD.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133004081","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
World class development: a key enabler for world class manufacturing 世界级的发展:世界级制造的关键推动者
[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium Pub Date : 1991-09-16 DOI: 10.1109/IEMT.1991.279741
W.J. Eisenman
{"title":"World class development: a key enabler for world class manufacturing","authors":"W.J. Eisenman","doi":"10.1109/IEMT.1991.279741","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279741","url":null,"abstract":"It is pointed out that achievement and maintenance of status as a world class manufacturing organization is dependent on numerous factors. Analysis of those factors in the manufacturing environment often ignores the role of product development and its input to the manufacturing process. This is because the creative development process is not typically considered amenable to measurement. The author describes a set of metrics that were designed and implemented by a group of engineering executives to quantify the importance of world class development as a key enabler for world class manufacturing.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133727092","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Fundamental study on solder paste for fine pitch soldering 细间距焊接用锡膏的基础研究
[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium Pub Date : 1991-09-16 DOI: 10.1109/IEMT.1991.279769
S. Fujiuchi
{"title":"Fundamental study on solder paste for fine pitch soldering","authors":"S. Fujiuchi","doi":"10.1109/IEMT.1991.279769","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279769","url":null,"abstract":"For fine pitch QFP soldering, solder amount and locations applied on pad must be precisely controlled. Solder paste has been printed individually on each pad for most card assemblies, but this printing method is confronted with process control difficulties. As a solution of these potential problems, a new type of printing method, in which many pads are covered with one bar (or belt) shaped paste pattern, is under evaluation. The author describes some experimental studies of solder paste suitable for this printing method and the feasibility for fine pitch soldering. An experiment on three kinds of solder pastes showed that low-melting solder containing SN-Pb-Bi eutectic solder was suitable for this method because of its good solderability and even solder amount on each pad after reflow soldering. These advantages seemed to result from partial melting of low-melting solder and bonding between solder particles during preheating in the reflow process. This was confirmed by scanning electron microscopy. With this printing method, soldering of fine pitch (0.5/0.3 mm) leads was successfully demonstrated.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130025264","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
IC manufacturing diagnosis based on statistical analysis techniques 基于统计分析技术的集成电路制造诊断
[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium Pub Date : 1991-09-16 DOI: 10.1109/IEMT.1991.279824
J. Kibarian, A. Strojwas
{"title":"IC manufacturing diagnosis based on statistical analysis techniques","authors":"J. Kibarian, A. Strojwas","doi":"10.1109/IEMT.1991.279824","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279824","url":null,"abstract":"The authors present algorithms which can be used to analyze parametric data for the purposes of understanding the causes of yield loss for a batch of manufactured wafers. Data from an industrial fabrication line were analyzed to show the validity of the approach. Key features of this approach are a brief learning phase and the ability to use both spatial information and electrical characteristics in the analysis. The short learning phase is achieved because only sensitivity information is collected from the simulators. The spatial information is derived from the stochastic models used for the performances. The linearity assumptions, implicitly made when a sample correlation matrix is computed, are checked when a factor cannot be interrupted.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"311 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131904348","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Polyquinoline coatings and films: improved organic dielectrics for IC's and MCM's 聚喹啉涂层和薄膜:用于集成电路和MCM的改进有机介电材料
[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium Pub Date : 1991-09-16 DOI: 10.1109/IEMT.1991.279815
N. Hendricks, L. Hsu, C. Taran, M. Marrocco
{"title":"Polyquinoline coatings and films: improved organic dielectrics for IC's and MCM's","authors":"N. Hendricks, L. Hsu, C. Taran, M. Marrocco","doi":"10.1109/IEMT.1991.279815","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279815","url":null,"abstract":"It is pointed out that polymers intended for use in electronics applications must meet a diverse set of stringent requirements on their mechanical, physical, chemical, and electronic properties. New polyquinolines, developed at Maxdem, possess outstanding properties across the board, making them ideal candidates for applications in the electronics industry. These polymers are characterized by excellent thermal and oxidative stability, very low moisture absorption and very low dielectric constant. One member of the family of polyquinolines, PQ-100, is currently under evaluation for use as an interlayer dielectric in high density interconnect applications, including multichip modules. PQ-100 can be cast into free standing films or spin coated to form high-quality coatings on silicon or other surfaces. Films of PQ-100 display a very low thermal expansion coefficient, and extremely low residual stress on silicon substrates. PQ-100 outperforms polyimides in these and other areas critical to high speed, high density packaging.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"47 15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134222773","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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