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Formal Methods in System Design最新文献

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Thread-modular counter abstraction: automated safety and termination proofs of parameterized software by reduction to sequential program verification 线程模块化计数器抽象:通过简化为顺序程序验证来实现参数化软件的自动安全性和终止证明
4区 计算机科学
Formal Methods in System Design Pub Date : 2023-10-06 DOI: 10.1007/s10703-023-00439-6
Thomas Pani, Georg Weissenbacher, Florian Zuleger
{"title":"Thread-modular counter abstraction: automated safety and termination proofs of parameterized software by reduction to sequential program verification","authors":"Thomas Pani, Georg Weissenbacher, Florian Zuleger","doi":"10.1007/s10703-023-00439-6","DOIUrl":"https://doi.org/10.1007/s10703-023-00439-6","url":null,"abstract":"Abstract Parameterized programs are composed of an arbitrary number of concurrent, infinite-state threads. Automated safety and liveness proofs of such parameterized software are hard; state-of-the-art methods for their formal verification rely on intricate abstractions and complicated proof techniques that impede automation. In this paper, we introduce thread-modular counter abstraction (TMCA), a lean new abstraction technique to replace the existing heavy proof machinery. TMCA is a structured abstraction framework built from a novel combination of counter abstraction , thread-modular reasoning , and predicate abstraction . Its major strength lies in reducing the parameterized verification problem to the sequential setting, for which powerful proof procedures, efficient heuristics, and effective automated tools have been developed over the past decades. In this work, we first introduce the TMCA abstraction paradigm, then present a fully automated method for parameterized safety proofs, and finally discuss its application to automated termination and liveness proofs of parameterized software.","PeriodicalId":12430,"journal":{"name":"Formal Methods in System Design","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-10-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135346746","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Preface for the formal methods in system design special issue on ‘Formal Methods 2021’ 系统设计中的形式方法前言“2021年形式方法”特刊
4区 计算机科学
Formal Methods in System Design Pub Date : 2023-10-02 DOI: 10.1007/s10703-023-00438-7
Marieke Huisman, Corina S. Păsăreanu, Naijun Zhan
{"title":"Preface for the formal methods in system design special issue on ‘Formal Methods 2021’","authors":"Marieke Huisman, Corina S. Păsăreanu, Naijun Zhan","doi":"10.1007/s10703-023-00438-7","DOIUrl":"https://doi.org/10.1007/s10703-023-00438-7","url":null,"abstract":"","PeriodicalId":12430,"journal":{"name":"Formal Methods in System Design","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-10-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135894767","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Verification modulo theories 验证模理论
IF 0.8 4区 计算机科学
Formal Methods in System Design Pub Date : 2023-09-19 DOI: 10.1007/s10703-023-00434-x
Alessandro Cimatti, Alberto Griggio, Sergio Mover, Marco Roveri, Stefano Tonetta
{"title":"Verification modulo theories","authors":"Alessandro Cimatti, Alberto Griggio, Sergio Mover, Marco Roveri, Stefano Tonetta","doi":"10.1007/s10703-023-00434-x","DOIUrl":"https://doi.org/10.1007/s10703-023-00434-x","url":null,"abstract":"<p>In this paper, we consider the problem of model checking fair transition systems expressed symbolically in the framework of Satisfiability Modulo Theories. This problem, referred to as Verification Modulo Theories, is tackled by combining two key elements from the legacy of Ed Clarke: SAT-based verification and abstraction refinement. We show how fundamental SAT-based algorithms have been lifted to deal with the extended expressiveness with a tight integration of abstraction within a CEGAR loop. In turn, the case of nonlinear theories is based on a CEGAR loop over the linear case. These two elements have also deeply impacted the development of the NuSMV model checker, born from a joint project between FBK and CMU, and its successor nuXmv, whose core integrates SMT-based techniques for VMT.</p>","PeriodicalId":12430,"journal":{"name":"Formal Methods in System Design","volume":"212 1","pages":""},"PeriodicalIF":0.8,"publicationDate":"2023-09-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"138539761","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Verification modulo theories 验证模理论
IF 0.8 4区 计算机科学
Formal Methods in System Design Pub Date : 2023-09-19 DOI: 10.1007/s10703-023-00434-x
Alessandro Cimatti, Alberto Griggio, Sergio Mover, Marco Roveri, Stefano Tonetta
{"title":"Verification modulo theories","authors":"Alessandro Cimatti, Alberto Griggio, Sergio Mover, Marco Roveri, Stefano Tonetta","doi":"10.1007/s10703-023-00434-x","DOIUrl":"https://doi.org/10.1007/s10703-023-00434-x","url":null,"abstract":"<p>In this paper, we consider the problem of model checking fair transition systems expressed symbolically in the framework of Satisfiability Modulo Theories. This problem, referred to as Verification Modulo Theories, is tackled by combining two key elements from the legacy of Ed Clarke: SAT-based verification and abstraction refinement. We show how fundamental SAT-based algorithms have been lifted to deal with the extended expressiveness with a tight integration of abstraction within a CEGAR loop. In turn, the case of nonlinear theories is based on a CEGAR loop over the linear case. These two elements have also deeply impacted the development of the NuSMV model checker, born from a joint project between FBK and CMU, and its successor nuXmv, whose core integrates SMT-based techniques for VMT.</p>","PeriodicalId":12430,"journal":{"name":"Formal Methods in System Design","volume":"212 1","pages":""},"PeriodicalIF":0.8,"publicationDate":"2023-09-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"138539748","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Edmund Melson Clarke, Jr. (1945–2020) 小埃德蒙·梅尔森·克拉克(1945-2020)
4区 计算机科学
Formal Methods in System Design Pub Date : 2023-09-14 DOI: 10.1007/s10703-023-00437-8
Sicun Gao, Orna Grumberg, Paolo Zuliani
{"title":"Edmund Melson Clarke, Jr. (1945–2020)","authors":"Sicun Gao, Orna Grumberg, Paolo Zuliani","doi":"10.1007/s10703-023-00437-8","DOIUrl":"https://doi.org/10.1007/s10703-023-00437-8","url":null,"abstract":"","PeriodicalId":12430,"journal":{"name":"Formal Methods in System Design","volume":"76 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-09-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134912355","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Enhancing active model learning with equivalence checking using simulation relations 利用仿真关系进行等价检验，增强主动模型学习
IF 0.8 4区 计算机科学
Formal Methods in System Design Pub Date : 2023-08-06 DOI: 10.1007/s10703-023-00433-y
Natasha Yogananda Jeppu, T. Melham, D. Kroening
{"title":"Enhancing active model learning with equivalence checking using simulation relations","authors":"Natasha Yogananda Jeppu, T. Melham, D. Kroening","doi":"10.1007/s10703-023-00433-y","DOIUrl":"https://doi.org/10.1007/s10703-023-00433-y","url":null,"abstract":"","PeriodicalId":12430,"journal":{"name":"Formal Methods in System Design","volume":" ","pages":""},"PeriodicalIF":0.8,"publicationDate":"2023-08-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"46706513","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Certified SAT solving with GPU accelerated inprocessing 认证SAT解决与GPU加速处理
IF 0.8 4区 计算机科学
Formal Methods in System Design Pub Date : 2023-08-02 DOI: 10.1007/s10703-023-00432-z
M. Osama, Anton Wijs, Armin Biere
{"title":"Certified SAT solving with GPU accelerated inprocessing","authors":"M. Osama, Anton Wijs, Armin Biere","doi":"10.1007/s10703-023-00432-z","DOIUrl":"https://doi.org/10.1007/s10703-023-00432-z","url":null,"abstract":"","PeriodicalId":12430,"journal":{"name":"Formal Methods in System Design","volume":" ","pages":""},"PeriodicalIF":0.8,"publicationDate":"2023-08-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"46498825","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Concise outlines for a complex logic: a proof outline checker for TaDA 复杂逻辑的简明大纲:TaDA的证明大纲检查器
4区 计算机科学
Formal Methods in System Design Pub Date : 2023-07-31 DOI: 10.1007/s10703-023-00427-w
Felix A. Wolf, Malte Schwerhoff, Peter Müller
{"title":"Concise outlines for a complex logic: a proof outline checker for TaDA","authors":"Felix A. Wolf, Malte Schwerhoff, Peter Müller","doi":"10.1007/s10703-023-00427-w","DOIUrl":"https://doi.org/10.1007/s10703-023-00427-w","url":null,"abstract":"Abstract Modern separation logics allow one to prove rich properties of intricate code, e.g., functional correctness and linearizability of non-blocking concurrent code. However, this expressiveness leads to a complexity that makes these logics difficult to apply. Manual proofs or proofs in interactive theorem provers consist of a large number of steps, often with subtle side conditions. On the other hand, automation with dedicated verifiers typically requires sophisticated proof search algorithms that are specific to the given program logic, resulting in limited tool support that makes it difficult to experiment with program logics, e.g., when learning, improving, or comparing them. Proof outline checkers fill this gap. Their input is a program annotated with the most essential proof steps, just like the proof outlines typically presented in papers. The tool then checks automatically that this outline represents a valid proof in the program logic. In this paper, we systematically develop a proof outline checker for the TaDA logic, which reduces the checking to a simpler verification problem, for which automated tools exist. Our approach leads to proof outline checkers that provide substantially more automation than interactive provers, but are much simpler to develop than custom automatic verifiers.","PeriodicalId":12430,"journal":{"name":"Formal Methods in System Design","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-07-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135154480","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Dissecting ltlsynt 剖析ltlsynt
IF 0.8 4区 计算机科学
Formal Methods in System Design Pub Date : 2023-07-14 DOI: 10.1007/s10703-022-00407-6
Florian Renkin, Philipp Schlehuber-Caissier, A. Duret-Lutz, Adrien Pommellet
{"title":"Dissecting ltlsynt","authors":"Florian Renkin, Philipp Schlehuber-Caissier, A. Duret-Lutz, Adrien Pommellet","doi":"10.1007/s10703-022-00407-6","DOIUrl":"https://doi.org/10.1007/s10703-022-00407-6","url":null,"abstract":"","PeriodicalId":12430,"journal":{"name":"Formal Methods in System Design","volume":" ","pages":""},"PeriodicalIF":0.8,"publicationDate":"2023-07-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"43309901","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Round- and context-bounded control of dynamic pushdown systems 动态下推系统的圆边界和上下文边界控制
IF 0.8 4区 计算机科学
Formal Methods in System Design Pub Date : 2023-07-07 DOI: 10.1007/s10703-023-00431-0
B. Bollig, Mathieu Lehaut, N. Sznajder
{"title":"Round- and context-bounded control of dynamic pushdown systems","authors":"B. Bollig, Mathieu Lehaut, N. Sznajder","doi":"10.1007/s10703-023-00431-0","DOIUrl":"https://doi.org/10.1007/s10703-023-00431-0","url":null,"abstract":"","PeriodicalId":12430,"journal":{"name":"Formal Methods in System Design","volume":" ","pages":""},"PeriodicalIF":0.8,"publicationDate":"2023-07-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"43319758","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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