Formal Methods in System Design最新文献

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Boolean functional synthesis: hardness and practical algorithms 布尔泛函合成:硬度和实用算法
IF 0.8 4区 计算机科学
Formal Methods in System Design Pub Date : 2020-10-21 DOI: 10.1007/s10703-020-00352-2
S. Akshay, Supratik Chakraborty, Shubham Goel, Sumith Kulal, Shetal Shah
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引用次数: 6
Automated repair by example for firewalls 防火墙的自动修复示例
IF 0.8 4区 计算机科学
Formal Methods in System Design Pub Date : 2020-09-30 DOI: 10.1007/s10703-020-00346-0
William T. Hallahan, Ennan Zhai, R. Piskac
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引用次数: 0
Multi-scale verification of distributed synchronisation 分布式同步的多尺度验证
IF 0.8 4区 计算机科学
Formal Methods in System Design Pub Date : 2020-09-20 DOI: 10.1007/s10703-020-00347-z
Paul Gainer, Sven Linker, Clare Dixon, U. Hustadt, M. Fisher
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引用次数: 4
Automatic verification of concurrent stochastic systems 并发随机系统的自动验证
IF 0.8 4区 计算机科学
Formal Methods in System Design Pub Date : 2020-08-11 DOI: 10.1007/s10703-020-00356-y
M. Kwiatkowska, G. Norman, D. Parker, Gabriel Santos
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引用次数: 17
Exact quantitative probabilistic model checking through rational search 通过理性搜索进行精确定量的概率模型检验
IF 0.8 4区 计算机科学
Formal Methods in System Design Pub Date : 2020-07-29 DOI: 10.1007/s10703-020-00348-y
Umang Mathur, Matthew S. Bauer, Rohit Chadha, A. Sistla, Mahesh Viswanathan
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引用次数: 0
Distributed bounded model checking 分布式有界模型检查
IF 0.8 4区 计算机科学
Formal Methods in System Design Pub Date : 2020-05-16 DOI: 10.34727/2020/isbn.978-3-85448-042-6_11
Prantik Chatterjee, Subhajit Roy, Bui Phi Diep, A. Lal
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引用次数: 6
Incremental column-wise verification of arithmetic circuits using computer algebra. 利用计算机代数对算术电路进行增量列式验证。
IF 0.7 4区 计算机科学
Formal Methods in System Design Pub Date : 2020-01-01 Epub Date: 2019-02-26 DOI: 10.1007/s10703-018-00329-2
Daniela Kaufmann, Armin Biere, Manuel Kauers
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引用次数: 0
Correction to: A survey of challenges for runtime verification from advanced application domains (beyond software) 更正:对高级应用程序领域(软件之外)运行时验证挑战的调查
IF 0.8 4区 计算机科学
Formal Methods in System Design Pub Date : 2019-11-15 DOI: 10.1007/s10703-019-00343-y
César Sánchez, Gerardo Schneider, Wolfgang Ahrendt, E. Bartocci, Domenico Bianculli, C. Colombo, Yliès Falcone, Adrian Francalanza, S. Krstic, João M. Lourenço, D. Ničković, Gordon J. Pace, J. Rufino, Julien Signoles, Dmitriy Traytel, Alexander Weiss
{"title":"Correction to: A survey of challenges for runtime verification from advanced application domains (beyond software)","authors":"César Sánchez, Gerardo Schneider, Wolfgang Ahrendt, E. Bartocci, Domenico Bianculli, C. Colombo, Yliès Falcone, Adrian Francalanza, S. Krstic, João M. Lourenço, D. Ničković, Gordon J. Pace, J. Rufino, Julien Signoles, Dmitriy Traytel, Alexander Weiss","doi":"10.1007/s10703-019-00343-y","DOIUrl":"https://doi.org/10.1007/s10703-019-00343-y","url":null,"abstract":"","PeriodicalId":12430,"journal":{"name":"Formal Methods in System Design","volume":"55 1","pages":"72 - 72"},"PeriodicalIF":0.8,"publicationDate":"2019-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1007/s10703-019-00343-y","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"43252715","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Exploiting partial variable assignment in interpolation-based model checking 在基于插值的模型检验中利用部分变量赋值
IF 0.8 4区 计算机科学
Formal Methods in System Design Pub Date : 2019-11-07 DOI: 10.1007/s10703-019-00342-z
Pavel Jancík, J. Kofroň, Leonardo S. Alt, Grigory Fedyukovich, A. Hyvärinen, N. Sharygina
{"title":"Exploiting partial variable assignment in interpolation-based model checking","authors":"Pavel Jancík, J. Kofroň, Leonardo S. Alt, Grigory Fedyukovich, A. Hyvärinen, N. Sharygina","doi":"10.1007/s10703-019-00342-z","DOIUrl":"https://doi.org/10.1007/s10703-019-00342-z","url":null,"abstract":"","PeriodicalId":12430,"journal":{"name":"Formal Methods in System Design","volume":"55 1","pages":"33 - 71"},"PeriodicalIF":0.8,"publicationDate":"2019-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1007/s10703-019-00342-z","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"48058371","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Annotation guided collection of context-sensitive parallel execution profiles 注释引导上下文敏感的并行执行概要文件的收集
IF 0.8 4区 计算机科学
Formal Methods in System Design Pub Date : 2019-10-09 DOI: 10.1007/s10703-019-00341-0
Zachary Benavides, Rajiv Gupta, X. Zhang
{"title":"Annotation guided collection of context-sensitive parallel execution profiles","authors":"Zachary Benavides, Rajiv Gupta, X. Zhang","doi":"10.1007/s10703-019-00341-0","DOIUrl":"https://doi.org/10.1007/s10703-019-00341-0","url":null,"abstract":"","PeriodicalId":12430,"journal":{"name":"Formal Methods in System Design","volume":"54 1","pages":"388 - 415"},"PeriodicalIF":0.8,"publicationDate":"2019-10-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1007/s10703-019-00341-0","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"48345276","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
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