Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future'最新文献_第7页

Reliability of novel die attach adhesive for snap curing 新型模贴胶快速固化的可靠性

Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future' Pub Date : 1995-10-02 DOI: 10.1109/IEMT.1995.526106

D. Galloway, M. Grosse, M. Nguyen, A. Burkhart

引用次数: 4

Electrical performance analysis of a three-dimensional package 三维封装的电气性能分析

Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future' Pub Date : 1995-10-02 DOI: 10.1109/IEMT.1995.526102

Seung-Ho Ahn, Kyung-Sun Lee, Se-Young Oh, E. Miersch

引用次数: 1

Properties of thin layers of Sn62Pb36Ag2 Sn62Pb36Ag2薄层的性质

Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future' Pub Date : 1995-10-02 DOI: 10.1109/IEMT.1995.526211

G. Grossmann, L. Weher, K. Heiduschke

引用次数: 6

Reliability of soldered silicon devices on copper alloys 铜合金上焊接硅器件的可靠性

Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future' Pub Date : 1995-10-02 DOI: 10.1109/IEMT.1995.526107

A. Achari, W. Green

引用次数: 0

Run by run control of chemical-mechanical polishing 化学-机械抛光逐行控制

Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future' Pub Date : 1995-10-02 DOI: 10.1109/IEMT.1995.526097

D. Boning, W. Moyne, T. Smith, J. Moyne, R. Trelfeyan, A. Hurwitz, S. Sellman, J. Taylor

{"title":"Run by run control of chemical-mechanical polishing","authors":"D. Boning, W. Moyne, T. Smith, J. Moyne, R. Trelfeyan, A. Hurwitz, S. Sellman, J. Taylor","doi":"10.1109/IEMT.1995.526097","DOIUrl":"https://doi.org/10.1109/IEMT.1995.526097","url":null,"abstract":"A prototype hardware/software system has been developed and applied to the control of single wafer chemical-mechanical polishing (CMP) processes. The control methodology consists of experimental design to build response surface and linearized control models of the process, and the use of feedback control to change recipe parameters (machine settings) on a lot by lot basis. Acceptable regression models were constructed for average removal rate and nonuniformity, which are calculated based on film thickness measurement at nine points on 8\" blanket oxide wafers. For control, an exponentially weighted moving average model adaptation strategy was used, coupled to multivariate recipe generation incorporating user weights on the inputs and outputs, bounds on the input ranges, and discretization in the machine settings. We found that this strategy successfully compensated for substantial drift in the uncontrolled tool's removal rate. It was also found that the equipment model generated during the experimental design was surprisingly robust; the same model was effective across more than one CMP tool, and over a several month period.","PeriodicalId":123707,"journal":{"name":"Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future'","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129828433","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 117

Distributed control of hot bar thermode in fine pitch surface mount assembly 细节距表面贴装组件中热棒热模的分布控制

Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future' Pub Date : 1995-10-02 DOI: 10.1109/IEMT.1995.526181

V. Skormin, K. Park

引用次数: 1

Measurement of solder paste component retention properties 锡膏成分保持性能的测量

Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future' Pub Date : 1995-10-02 DOI: 10.1109/IEMT.1995.526186

S. Thomas, K. Srihari, A. McLenaghan, G. Westby

引用次数: 1

Towards a standard for differential scanning calorimetry measurement of solder paste products 锡膏产品差示扫描量热法测量标准的研究

Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future' Pub Date : 1995-10-02 DOI: 10.1109/IEMT.1995.526184

M.R. Kalantary, P. Conway, F. Sarvar, D.J. Williams

{"title":"Towards a standard for differential scanning calorimetry measurement of solder paste products","authors":"M.R. Kalantary, P. Conway, F. Sarvar, D.J. Williams","doi":"10.1109/IEMT.1995.526184","DOIUrl":"https://doi.org/10.1109/IEMT.1995.526184","url":null,"abstract":"With the continuing technological advancement in circuit board and component design there is a need to understand the overall soldering process including solder materials, printing applications and reflow processes. This is due to increased component packing density with the subsequent decrease in feature sizes and increases in joint counts per assembly. This places greater emphasis on the design of joint formation processes in order to manage, or predict, the outcome of the inherent process-materials interactions which determine the quality of joint formed. Differential Scanning Calorimetry (DSC) offers a potential avenue to describe, quantitatively, the interactions of joining media with joining processes and study the behaviour of solder pastes. This paper presents the results of a series of trials with DSC analysis of solder paste materials in order to determine the suitability of the DSC technique as a means to characterise these materials with respect to intended manufacturing processes. The results indicate that there is a necessity for standardised DSC testing methodologies which control key test variables including the mass of the solder sample.","PeriodicalId":123707,"journal":{"name":"Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future'","volume":"158 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116913509","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Real-time diagnosis of semiconductor manufacturing equipment using neural networks 基于神经网络的半导体制造设备实时诊断

Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future' Pub Date : 1995-10-02 DOI: 10.1109/IEMT.1995.526119

Byungwhan Kim, G. May

{"title":"Real-time diagnosis of semiconductor manufacturing equipment using neural networks","authors":"Byungwhan Kim, G. May","doi":"10.1109/IEMT.1995.526119","DOIUrl":"https://doi.org/10.1109/IEMT.1995.526119","url":null,"abstract":"This paper presents a tool for the real-time diagnosis of integrated circuit fabrication equipment. The approach focuses on integrating neural networks into a knowledge-based expert system. The system employs evidential reasoning to identify malfunctions by combining evidence originating from equipment maintenance history, on-line sensor data, and in-line past-process measurements. Neural networks are used in the maintenance phase of diagnosis to approximate the functional form of the failure history distribution of each component. Predicted failure rates are then converted to belief levels. For on-line diagnosis in the case of previously unencountered faults, a CUSUM control chart is implemented on real sensor data to detect very small process shifts and their trends. For the known fault case, hypothesis resting on the statistical mean and variance of the sensor data is performed to search for similar data patterns and assign belief levels. Finally, neural process models of process figures of merit (such as etch uniformity) derived from prior experimentation are used to analyze the in-line measurements, and identify the most suitable candidate among faulty input parameters (such as gas flow) to explain process shifts. A working prototype for this hybrid diagnostic system is being implemented on the Plasma Therm 700 series reactive ion etcher located in the Georgia Tech Microelectronic Research Center.","PeriodicalId":123707,"journal":{"name":"Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future'","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132115604","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 9

Void formation in flip-chip solder bumps. I 倒装片焊料凸起处的空洞形成。我

Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future' Pub Date : 1995-10-02 DOI: 10.1109/IEMT.1995.526084

L. Goenka, A. Achari

{"title":"Void formation in flip-chip solder bumps. I","authors":"L. Goenka, A. Achari","doi":"10.1109/IEMT.1995.526084","DOIUrl":"https://doi.org/10.1109/IEMT.1995.526084","url":null,"abstract":"Void formation in solder bumps occurs due to the formation and coagulation of gas bubbles from the combustion of flux during the solder reflow process. The formation of such voids can result in the failure of solder joints under the application of load. This study aims at determining the factors which affect the formation and growth of these voids. It consists of evaluating numerous cross-sections of solder bumps, as well as the numerical modeling of the flow and bubble dynamics within the solder bump during the solder reflow process. The cross sections reveal several cases in which a large void is formed within the solder bump. Generally, in the absence of such a void, a large number of smaller bubbles accumulate at the top of the joint, and often result in crack propagation through them. A simplified, two-dimensional numerical model to simulate the motion and coalescence of bubbles in a solder bump has been developed. A recirculative flow within the melt region is assumed. This recirculation is caused by the temperature differential between the exterior and interior boundaries of the melt region. A heat-transfer analysis predicts the movement of the melt front during reflow. It is hoped that this model, along with a study of joint cross sections, will lend some insight into the factors that affect the formation and distribution of voids within solder bumps.","PeriodicalId":123707,"journal":{"name":"Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future'","volume":"136 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123188402","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 18