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2021 IEEE Workshop on Signal Processing Systems (SiPS)最新文献

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Mixed Precision ℓ1 Solver for Compressive Depth Reconstruction: An ADMM Case Study 压缩深度重构的混合精度求解器&以ADMM为例
2021 IEEE Workshop on Signal Processing Systems (SiPS) Pub Date : 2021-10-01 DOI: 10.1109/SiPS52927.2021.00021
Yun Wu, A. Wallace, A. Aßmann, Brian D. Stewart
{"title":"Mixed Precision ℓ1 Solver for Compressive Depth Reconstruction: An ADMM Case Study","authors":"Yun Wu, A. Wallace, A. Aßmann, Brian D. Stewart","doi":"10.1109/SiPS52927.2021.00021","DOIUrl":"https://doi.org/10.1109/SiPS52927.2021.00021","url":null,"abstract":"Rapid reconstruction of depth images from sparsely sampled data is important for many machine learning applications, including robot or vehicle assistance or autonomy, which require low power LiDAR sensing for eye safety, and resource reduction for FPGA or solid state implementation, especially with constrained energy budgets. A new compressive depth reconstruction design approach is proposed using a compact ADMM solver for the lasso problem, which varies the precision scaling in an iterative optimization process. Implementations on an FPGA architecture show over 55% savings in hardware resources and 78% in power with only minor reduction in reconstructed depth image quality compared to single float precision.","PeriodicalId":103894,"journal":{"name":"2021 IEEE Workshop on Signal Processing Systems (SiPS)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126262154","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
[Title page i] [标题页i]
2021 IEEE Workshop on Signal Processing Systems (SiPS) Pub Date : 2021-10-01 DOI: 10.1109/sips52927.2021.00001
{"title":"[Title page i]","authors":"","doi":"10.1109/sips52927.2021.00001","DOIUrl":"https://doi.org/10.1109/sips52927.2021.00001","url":null,"abstract":"","PeriodicalId":103894,"journal":{"name":"2021 IEEE Workshop on Signal Processing Systems (SiPS)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132562285","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
DFBNet: Deep Neural Network based Fixed Beamformer for Multi-channel Speech Separation 基于深度神经网络的多通道语音分离固定波束形成器
2021 IEEE Workshop on Signal Processing Systems (SiPS) Pub Date : 2021-10-01 DOI: 10.1109/SiPS52927.2021.00042
Ruqiao Liu, Yi Zhou, Hongqing Liu, Xinmeng Xu, Jie Jia, Binbin Chen
{"title":"DFBNet: Deep Neural Network based Fixed Beamformer for Multi-channel Speech Separation","authors":"Ruqiao Liu, Yi Zhou, Hongqing Liu, Xinmeng Xu, Jie Jia, Binbin Chen","doi":"10.1109/SiPS52927.2021.00042","DOIUrl":"https://doi.org/10.1109/SiPS52927.2021.00042","url":null,"abstract":"The deep neural networks (DNNs) based beamformers have achieved significant improvements in speech separation tasks. This paper proposes a novel deep neural network (DNN) based fixed beamformer (DFBNet) that uniformly samples the space as a learning module. In addition, the initial coefficients of fixed beamformers in DFBNet are determined by the existing superdirective beamformer. Furthermore, to obtain the beams that related to each speaker, the proposed model has introduced a speech source estimation model, dual-path RNN (DPRNN), and an attention mechanism. The experimental results show that in the separation task with reverberation, the proposed way has better performance on scale-invariant signal-to-noise ratio (SI-SNR) and perceptual evaluation of speech quality (PESQ) than DPRNN and filter-and-sum network (FasNet) which is currently the most state-of-the-art temporal neural beamformer.","PeriodicalId":103894,"journal":{"name":"2021 IEEE Workshop on Signal Processing Systems (SiPS)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128153718","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Flexible Channel Estimation for 3GPP 5G IoT on a Vector Digital Signal Processor 基于矢量数字信号处理器的3GPP 5G物联网柔性信道估计
2021 IEEE Workshop on Signal Processing Systems (SiPS) Pub Date : 2021-10-01 DOI: 10.1109/SiPS52927.2021.00011
Stefan A. Damjancevic, Samuel Ajay Dasgupta, E. Matús, Dmitry Utyanksy, P. V. D. Wolf, G. Fettweis
{"title":"Flexible Channel Estimation for 3GPP 5G IoT on a Vector Digital Signal Processor","authors":"Stefan A. Damjancevic, Samuel Ajay Dasgupta, E. Matús, Dmitry Utyanksy, P. V. D. Wolf, G. Fettweis","doi":"10.1109/SiPS52927.2021.00011","DOIUrl":"https://doi.org/10.1109/SiPS52927.2021.00011","url":null,"abstract":"The new 5G Reduced Capability (RedCap) protocol offers up to 88x and 528x higher data rates and dynamic pilot placements compared to previous Cat-M and NB-IoT standards, respectively. This leads to high application variability of IoT devices and therefore poses a challenge for the implementation of channel estimation (CE), especially under weak radio signal conditions. However, due to the computational complexity of optimal methods, practical suboptimal approaches with denoising capability are preferred in low-power devices. This work investigates the performance and implementation aspects of practical IoT CE denoising techniques on a vector digital signal processor (vDSP). This solution enables adaptation to the new IoT workload requirements with a 15.9x speed-up compared to the non-vectorised approach at 99.2% processor efficiency. In addition, for the purpose of solution adaptation to various IoT standards, the clock frequency requirements for the complete channel estimation chain are analysed with respect to different processor configurations.","PeriodicalId":103894,"journal":{"name":"2021 IEEE Workshop on Signal Processing Systems (SiPS)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115302452","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Energy Efficiency of Photonic Convolution for Artificial Intelligence Workloads 用于人工智能工作负载的光子卷积能量效率
2021 IEEE Workshop on Signal Processing Systems (SiPS) Pub Date : 2021-10-01 DOI: 10.1109/sips52927.2021.00052
J. Weiss, P. Stark, Lorenz K. Muller, F. Horst, R. Dangel, B. Offrein
{"title":"Energy Efficiency of Photonic Convolution for Artificial Intelligence Workloads","authors":"J. Weiss, P. Stark, Lorenz K. Muller, F. Horst, R. Dangel, B. Offrein","doi":"10.1109/sips52927.2021.00052","DOIUrl":"https://doi.org/10.1109/sips52927.2021.00052","url":null,"abstract":"Energy Efficiency of Artificial Intelligence (AI) workloads increasingly becomes a challenge as i) they are being adopted by a growing community of industries and ii) the AI models used are growing tremendously in complexity. We can identify certain common operations which contribute to the bulk of the computations of these workloads and thus also to the overall energy footprint. Besides data-transport and generic multiply-accumulate operations, convolutions with relatively small kernels constitute a substantial part of today’s AI workloads. In this paper we will investigate potential and limitations of optical convolutional processors for AI workloads to improve their energy efficiency. We underline our findings with a thorough system analysis and with simulation and measurement results of a sequential lattice filter type optical convolutional processor on silicon.","PeriodicalId":103894,"journal":{"name":"2021 IEEE Workshop on Signal Processing Systems (SiPS)","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121815978","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Energy-Efficient Adaptive Modulated Fixed-Complexity Sphere Decoder 节能自适应调制固定复杂度球体解码器
2021 IEEE Workshop on Signal Processing Systems (SiPS) Pub Date : 2021-10-01 DOI: 10.1109/SiPS52927.2021.00023
Yun Wu, J. McAllister
{"title":"Energy-Efficient Adaptive Modulated Fixed-Complexity Sphere Decoder","authors":"Yun Wu, J. McAllister","doi":"10.1109/SiPS52927.2021.00023","DOIUrl":"https://doi.org/10.1109/SiPS52927.2021.00023","url":null,"abstract":"Fixed-Complexity Sphere Decoder (FSD) is an quasi-optimal detector for Multiple-Input Multiple-Output (MIMO) system which is a hardware-friendly parallel tree-search customised to the modulation and antenna scheme employed. However, it is not able to adapt its behaviour for various modulation and antenna schemes, as demanded by modern wireless standard. This restricts its usage in modern adaptive MIMO systems. This paper proposes a solution to this problem. A configurable FSD structure in proposed where normalized higher order modulation schemes can accommodate lower ones. By exploiting clock-gating, FSD of all modulation schemes is equally trimmed to allow power savings of over 30% when implementing on Field Programmable Gate Array (FPGA). This architecture enables the facility to balance the power consumptions with compatible information rate in dynamic, adaptive MIMO communications environments.","PeriodicalId":103894,"journal":{"name":"2021 IEEE Workshop on Signal Processing Systems (SiPS)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129776507","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Parallel CN-VN processing for NB-LDPC decoders NB-LDPC解码器的并行CN-VN处理
2021 IEEE Workshop on Signal Processing Systems (SiPS) Pub Date : 2021-10-01 DOI: 10.1109/SiPS52927.2021.00024
Hassan Harb, Cédric Marchand, L. Conde-Canencia, E. Boutillon, A. Ghouwayel
{"title":"Parallel CN-VN processing for NB-LDPC decoders","authors":"Hassan Harb, Cédric Marchand, L. Conde-Canencia, E. Boutillon, A. Ghouwayel","doi":"10.1109/SiPS52927.2021.00024","DOIUrl":"https://doi.org/10.1109/SiPS52927.2021.00024","url":null,"abstract":"In this paper, a novel and innovative approach to implement the check node and variable node phases of the EMS algorithm is proposed. The novelty is not only from the hardware side, but also from the algorithmic point of view. An unusual manner of processing some steps of the check and variable nodes are shown. The performance and implementation results are promising to dig deeper in this work. Compared to its serial counterpart, the synthesis results of the proposed architecture show a factor gain greater than two in terms of area efficiency, with negligible performance loss.","PeriodicalId":103894,"journal":{"name":"2021 IEEE Workshop on Signal Processing Systems (SiPS)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121734000","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Evaluation of Low-Voltage SRAM for Error-Resilient Augmented Reality Applications 抗错误性增强现实应用的低压SRAM评估
2021 IEEE Workshop on Signal Processing Systems (SiPS) Pub Date : 2021-10-01 DOI: 10.1109/SiPS52927.2021.00051
Tony F. Wu, Doyun Kim, D. Morris, E. Beigné
{"title":"Evaluation of Low-Voltage SRAM for Error-Resilient Augmented Reality Applications","authors":"Tony F. Wu, Doyun Kim, D. Morris, E. Beigné","doi":"10.1109/SiPS52927.2021.00051","DOIUrl":"https://doi.org/10.1109/SiPS52927.2021.00051","url":null,"abstract":"Augmented reality (AR) aims to implement applications, requiring high performance, while consuming low power on an all-day wearable, small form-factor, device. Luckily, many AR applications such as neural networks are error-resilient (i.e., results are same with errors in computation or memory), providing an opportunity to utilize low-power circuit techniques when implementing their building blocks in hardware. Many of these neural networks require significant use of on-chip memory such as SRAM (a major building block in hardware accelerators) for weight storage. This work shows that up to 30% dynamic energy and 30% leakage energy savings can be achieved by reducing the supply voltage of these SRAMs beyond rated voltages (thus, introducing errors), without measurable loss in neural network accuracy. Additional energy saving opportunities (up to 6%) can be captured by circuit modifications to shape the error probabilities of SRAMs at low voltages and incrementally training the neural networks.","PeriodicalId":103894,"journal":{"name":"2021 IEEE Workshop on Signal Processing Systems (SiPS)","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127941978","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Initial Analysis of Dynamic Panel Activation for Large Intelligent Surfaces 大型智能曲面动态面板激活的初步分析
2021 IEEE Workshop on Signal Processing Systems (SiPS) Pub Date : 2021-10-01 DOI: 10.1109/SiPS52927.2021.00012
N. Mazloum, O. Edfors
{"title":"Initial Analysis of Dynamic Panel Activation for Large Intelligent Surfaces","authors":"N. Mazloum, O. Edfors","doi":"10.1109/SiPS52927.2021.00012","DOIUrl":"https://doi.org/10.1109/SiPS52927.2021.00012","url":null,"abstract":"Large intelligent surfaces (LIS) have the potential to be the beyond-massive-MIMO solution, even further improving spectral efficiency, coverage, reliability and other performance measures. They also open up for entirely new services, such as precise localization, environment sensing, and wireless energy transfer. By constructing larger surfaces as a grid of panels, we can activate and deactivate these panels depending on their individual contributions to an overall service-defined performance measure and thereby use as little resources as possible. In this paper, we take initial steps in this direction by analyzing how surfaces built as grids of panels, of which only a fraction are activated, compare. We present three types of results, for an example environment: i) received power gain when allowing dynamic activation over a large surface rather than a single central located panel, ii) the required number of activated antenna elements to reach a minimum received power for different panel sizes, and iii) the locations of activated surface areas.","PeriodicalId":103894,"journal":{"name":"2021 IEEE Workshop on Signal Processing Systems (SiPS)","volume":"278 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115668019","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
An on-off receiver array for low-power scaling of mmWave massive MIMO 一种用于毫米波大规模MIMO的低功耗开关接收器阵列
2021 IEEE Workshop on Signal Processing Systems (SiPS) Pub Date : 2021-10-01 DOI: 10.1109/SiPS52927.2021.00041
M. Rasekh, Navid Hosseinzadeh, Upamanyu Madhow, M. Rodwell
{"title":"An on-off receiver array for low-power scaling of mmWave massive MIMO","authors":"M. Rasekh, Navid Hosseinzadeh, Upamanyu Madhow, M. Rodwell","doi":"10.1109/SiPS52927.2021.00041","DOIUrl":"https://doi.org/10.1109/SiPS52927.2021.00041","url":null,"abstract":"Low-power solutions are crucial for realizing the throughput gains of mmWave massive MIMO in base station to mobile links, particularly for the battery-powered handset. LNA power consumption is a significant bottleneck in scaling to large arrays at high frequencies. We propose a simplified phased array architecture for a 140 GHz receiver that uses activation switches in place of noisy phase shifters, allowing the relaxation of LNA gain requirements and, consequently, power consumption. On-off beamforming is employed, which introduces a tradeoff between aperture utilization and power efficiency. Our results show the potential for 7X power savings with approximately 40% average utilization of die area.","PeriodicalId":103894,"journal":{"name":"2021 IEEE Workshop on Signal Processing Systems (SiPS)","volume":"414 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115994658","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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