Evaluation of Low-Voltage SRAM for Error-Resilient Augmented Reality Applications

Augmented reality (AR) aims to implement applications, requiring high performance, while consuming low power on an all-day wearable, small form-factor, device. Luckily, many AR applications such as neural networks are error-resilient (i.e., results are same with errors in computation or memory), providing an opportunity to utilize low-power circuit techniques when implementing their building blocks in hardware. Many of these neural networks require significant use of on-chip memory such as SRAM (a major building block in hardware accelerators) for weight storage. This work shows that up to 30% dynamic energy and 30% leakage energy savings can be achieved by reducing the supply voltage of these SRAMs beyond rated voltages (thus, introducing errors), without measurable loss in neural network accuracy. Additional energy saving opportunities (up to 6%) can be captured by circuit modifications to shape the error probabilities of SRAMs at low voltages and incrementally training the neural networks.