2019 IEEE Real-Time Systems Symposium (RTSS)最新文献_第3页

Work-in-Progress: Synchronous Intersection Management Protocol for Mixed Traffic Flows 混合交通流的同步交叉口管理协议

2019 IEEE Real-Time Systems Symposium (RTSS) Pub Date : 2019-12-01 DOI: 10.1109/RTSS46320.2019.00068

R. Reddy, L. Almeida, E. Tovar

引用次数: 12

Segment Streaming for the Three-Phase Execution Model: Design and Implementation 三阶段执行模型的分段流:设计与实现

2019 IEEE Real-Time Systems Symposium (RTSS) Pub Date : 2019-12-01 DOI: 10.1109/RTSS46320.2019.00032

M. R. Soliman, G. Gracioli, Rohan Tabish, R. Pellizzoni, M. Caccamo

{"title":"Segment Streaming for the Three-Phase Execution Model: Design and Implementation","authors":"M. R. Soliman, G. Gracioli, Rohan Tabish, R. Pellizzoni, M. Caccamo","doi":"10.1109/RTSS46320.2019.00032","DOIUrl":"https://doi.org/10.1109/RTSS46320.2019.00032","url":null,"abstract":"Scheduling tasks using the three-phase execution model (load-execute-unload) can effectively reduce the contention on shared resources in real-time systems. Due to system and program constraints, a task is generally segmented and executed over multiple intervals. Several works showed that co-scheduling memory (unload-load) and computation phases can improve the system schedulability by hiding the memory transfer time. However, this is limited to segments of different tasks and hence executing segments of the same task back-to-back is not allowed. In this paper, we propose a new streaming model to allow overlapping the memory and execution phases of segments of the same task. This is accomplished by a segmentation framework implemented within an LLVM-based compiler-level tool along with a Real-Time Operating System (RTOS) API to handle load/unload requests. Memory phases are processed by a DMA engine that loads/unloads the task content into ScratchPad Memory (SPM). We provide a schedulability analysis of the proposed model under fixed priority partitioned scheme and an RTOS implementation of the API on a latest-generation Multiprocessor System-on-Chip (MPSoC).","PeriodicalId":102892,"journal":{"name":"2019 IEEE Real-Time Systems Symposium (RTSS)","volume":"os9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128324631","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 9

Mixed-Criticality Multicore Scheduling of Real-Time Gang Task Systems 实时组任务系统的混合临界多核调度

2019 IEEE Real-Time Systems Symposium (RTSS) Pub Date : 2019-12-01 DOI: 10.1109/RTSS46320.2019.00048

Ashikahmed Bhuiyan, Kecheng Yang, Samsil Arefin, Abusayeed Saifullah, Nan Guan, Zhishan Guo

{"title":"Mixed-Criticality Multicore Scheduling of Real-Time Gang Task Systems","authors":"Ashikahmed Bhuiyan, Kecheng Yang, Samsil Arefin, Abusayeed Saifullah, Nan Guan, Zhishan Guo","doi":"10.1109/RTSS46320.2019.00048","DOIUrl":"https://doi.org/10.1109/RTSS46320.2019.00048","url":null,"abstract":"Mixed-criticality (MC) scheduling of sequential tasks (with no intra-task parallelism) has been well-explored by the real-time systems community. However, till date, there has been little progress on MC scheduling of parallel tasks. MC scheduling of parallel tasks is highly challenging due to the requirement of various assurances under different criticality levels. In this work, we address the MC scheduling of parallel tasks of gang model that allows workloads to execute on multiple cores simultaneously. Such a workload model represents an efficient mode-based parallel processing scheme with many potential applications. To schedule such task sets, we propose a new technique GEDF-VD, which integrates Global Earliest Deadline First (GEDF) and Earliest Deadline First with Virtual Deadline (EDF-VD). We prove the correctness of GEDF-VD and provide a detailed quantitative evaluation in terms of speedup bound in both the MC and the non-MC cases. Specifically, we show that GEDF provides a speedup bound of 2 for non-MC gang tasks, while the speedup for GEDF-VD considering MC gang tasks is √5 + 1. Experiments on randomly generated gang task sets are conducted to validate our theoretical findings and to demonstrate the effectiveness of the proposed approach.","PeriodicalId":102892,"journal":{"name":"2019 IEEE Real-Time Systems Symposium (RTSS)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114441655","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 24

Work-in-Progress: Probabilistic System-Wide DVFS for Real-Time Embedded Systems 正在进行的工作:实时嵌入式系统的概率系统范围DVFS

2019 IEEE Real-Time Systems Symposium (RTSS) Pub Date : 2019-12-01 DOI: 10.1109/RTSS46320.2019.00051

R. Medina, L. Cucu-Grosjean

引用次数: 2

On Cyclic Dependencies and Regulators in Time-Sensitive Networks 时间敏感网络中的循环依赖性和调节器

2019 IEEE Real-Time Systems Symposium (RTSS) Pub Date : 2019-12-01 DOI: 10.1109/RTSS46320.2019.00035

Ludovic Thomas, J. Boudec, A. Mifdaoui

{"title":"On Cyclic Dependencies and Regulators in Time-Sensitive Networks","authors":"Ludovic Thomas, J. Boudec, A. Mifdaoui","doi":"10.1109/RTSS46320.2019.00035","DOIUrl":"https://doi.org/10.1109/RTSS46320.2019.00035","url":null,"abstract":"For time-sensitive networks, as in the context of IEEE TSN and IETF Detnet, cyclic dependencies are associated with certain fundamental properties such as improving availability and decreasing reconfiguration effort. Nevertheless, the existence of cyclic dependencies can cause very large latency bounds or even global instability, thus making the proof of the timing predictability of such networks a much more challenging issue. Cyclic dependencies can be removed by reshaping flows inside the network, by means of regulators. We consider FIFO-per-class networks with two types of regulators: perflow regulators and interleaved regulators (the latter reshape entire flow aggregates). Such regulators come with a hardware cost that is less for an interleaved regulator than for a perflow regulator; both can affect the latency bounds in different ways. We analyze the benefits of both types of regulators in partial and full deployments in terms of latency. First, we propose Low-Cost Acyclic Network (LCAN), a new algorithm for finding the optimum number of regulators for breaking all cyclic dependencies. Then, we provide another algorithm, Fixed- Point Total Flow Analysis (FP-TFA), for computing end-to-end delay bounds for general topologies, i.e., with and without cyclic dependencies. An extensive analysis of these proposed algorithms was conducted on generic grid topologies. For these test networks, we find that FP-TFA computes small latency bounds; but, at a medium to high utilization, the benefit of regulators becomes apparent. At high utilization or for high line transmission-rates, a small number of per-flow regulators has an effect on the latency bound larger than a small number of interleaved regulators. Moreover, interleaved regulators need to be placed everywhere in the network to provide noticeable improvements. We validate the applicability of our approaches on a realistic industrial timesensitive network.","PeriodicalId":102892,"journal":{"name":"2019 IEEE Real-Time Systems Symposium (RTSS)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123354244","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 15

Work-in-Progress: A Deep Learning Strategy for I/O Scheduling in Storage Systems 正在进行的工作:存储系统I/O调度的深度学习策略

2019 IEEE Real-Time Systems Symposium (RTSS) Pub Date : 2019-12-01 DOI: 10.1109/RTSS46320.2019.00066

Ashkan Farhangi, Jiang Bian, Jun Wang, Zhishan Guo

引用次数: 4

Necessary Feasibility Analysis for Mixed-Criticality Task Systems on Uniprocessor 单处理器上混合临界任务系统必要的可行性分析

2019 IEEE Real-Time Systems Symposium (RTSS) Pub Date : 2019-12-01 DOI: 10.1109/RTSS46320.2019.00046

H. Chwa, Hyeongboo Baek, Jinkyu Lee

{"title":"Necessary Feasibility Analysis for Mixed-Criticality Task Systems on Uniprocessor","authors":"H. Chwa, Hyeongboo Baek, Jinkyu Lee","doi":"10.1109/RTSS46320.2019.00046","DOIUrl":"https://doi.org/10.1109/RTSS46320.2019.00046","url":null,"abstract":"While feasibility of timing guarantees has been extensively studied for single-criticality (SC) task systems, the same cannot be said true for mixed-criticality (MC) task systems. In particular, there exist only a few studies that address necessary feasibility conditions for MC task systems, and all of them have derived trivial results from existing SC studies that rely on simple demand-supply comparison. In this paper, we develop necessary feasibility tests for MC task systems on a uniprocessor platform, which is the first study that yields non-trivial results for MC necessary feasibility. To this end, we investigate characteristics of MC necessary feasibility conditions. Due to the existence of the mode change and consequences thereof, the characteristics pose new challenges that cannot be resolved by existing techniques for SC task systems, including how to calculate demand when the mode change occurs, how to determine the target sub-intervals for demand-supply comparison, how to derive an infeasibility condition from demand-supply comparisons with different possible mode change instants, how to select a scenario to specify the mode change instant without the target scheduling algorithm, and how to find infeasible task sets with reasonable time-complexity. By addressing those challenges, we develop a new necessary feasibility test and its simplified version. The simulation results demonstrate that the proposed tests find a number of additional infeasible task sets which have been proven neither feasible nor infeasible by any existing studies.","PeriodicalId":102892,"journal":{"name":"2019 IEEE Real-Time Systems Symposium (RTSS)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126628253","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

Cost-Aware Edge Resource Probing for Infrastructure-Free Edge Computing: From Optimal Stopping to Layered Learning 无基础设施边缘计算的成本感知边缘资源探测:从最优停止到分层学习

2019 IEEE Real-Time Systems Symposium (RTSS) Pub Date : 2019-12-01 DOI: 10.1109/RTSS46320.2019.00041

Tao Ouyang, Xu Chen, Liekang Zeng, Zhi Zhou

{"title":"Cost-Aware Edge Resource Probing for Infrastructure-Free Edge Computing: From Optimal Stopping to Layered Learning","authors":"Tao Ouyang, Xu Chen, Liekang Zeng, Zhi Zhou","doi":"10.1109/RTSS46320.2019.00041","DOIUrl":"https://doi.org/10.1109/RTSS46320.2019.00041","url":null,"abstract":"To meet the stringent requirement of artificial intelligence applications, such as face recognition and video streaming analytics, a resource-constrained device can offload its task to nearby resource-rich devices in edge computing. Resource awareness, as a prime prerequisite for offloading decision-making, is critical for achieving efficient collaborative computation performance. In this paper, we consider cost-aware edge resource probing (CERP) framework design for infrastructure-free edge computing wherein a task device self-organizes its resource probing for informed computation offloading. We first propose a multi-stage optimal stopping formulation for the problem, and derive the optimal probing strategy which reveals a nice multi-threshold structure. Accordingly, we then devise a data-driven layered learning mechanism for more practical and complicated application environments. Layered learning enables the task device to adaptively learn the optimal probing sequence and decision thresholds at runtime, aiming at deriving a good balance between the gain of choosing the best edge device and the accumulated cost of deep resource probing. We further conduct thorough performance evaluation of the proposed CERP schemes using both extensive numerical simulations and realistic system prototype implementation, which demonstrate the superior performance of CERP in the diverse application scenarios.","PeriodicalId":102892,"journal":{"name":"2019 IEEE Real-Time Systems Symposium (RTSS)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116905625","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 13

Work-in-Progress: Migration Hints in Real-Time Operating Systems 正在进行的工作:实时操作系统中的迁移提示

2019 IEEE Real-Time Systems Symposium (RTSS) Pub Date : 2019-12-01 DOI: 10.1109/RTSS46320.2019.00056

Phillip Raffeck, Peter Ulbrich, Wolfgang Schröder-Preikschat

{"title":"Work-in-Progress: Migration Hints in Real-Time Operating Systems","authors":"Phillip Raffeck, Peter Ulbrich, Wolfgang Schröder-Preikschat","doi":"10.1109/RTSS46320.2019.00056","DOIUrl":"https://doi.org/10.1109/RTSS46320.2019.00056","url":null,"abstract":"Task migration is a potent instrument to exploit multi-core processors. Like full preemption, full migration is particularly advantageous as it allows the scheduler to relocate tasks at arbitrary times between cores. However, in hard real-time systems, migration is accompanied by a tremendous drawback: poor predictability and thus inevitable overapproximations in the worst-case execution-time analysis. This is due to the non-constant size of the tasks' resident set and the costs associated with its transfer between cores. As a result, migration is banned in many real-time systems, regressing the developer to a static allocation of tasks to cores with disadvantageous effects on the overall utilization and schedulability. In previous work, we successfully alleviated the shortcomings of full migration in real-time systems by reducing the associated costs and increasing its predictability. By employing static analysis, we were able to identify beneficial migration points and thus generate static schedules migrating tasks at these identified points. In ongoing work, we extend this approach to dynamic scheduling by providing information about advantageous migration points to an operating system which then makes migration decisions at runtime.","PeriodicalId":102892,"journal":{"name":"2019 IEEE Real-Time Systems Symposium (RTSS)","volume":"127 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115237631","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

Work-in-Progress: SAFE: Secure Authentication for Future Entities Using Internet of Vehicles 正在进行的工作:SAFE:使用车联网的未来实体的安全认证

2019 IEEE Real-Time Systems Symposium (RTSS) Pub Date : 2019-12-01 DOI: 10.1109/RTSS46320.2019.00064

Harsha Vasudev, Debasis Das

{"title":"Work-in-Progress: SAFE: Secure Authentication for Future Entities Using Internet of Vehicles","authors":"Harsha Vasudev, Debasis Das","doi":"10.1109/RTSS46320.2019.00064","DOIUrl":"https://doi.org/10.1109/RTSS46320.2019.00064","url":null,"abstract":"The innovations in wireless communication technologies, cloud computing, connected vehicles, autonomous vehicles, the Internet of everything, etc. opened a way for the creation, development, advancement, and establishment of vehicular networks for emerging smart city applications. Among them, automated and connected vehicle technologies are among the most researched topics. The currently available concepts are only a fraction of what is being developed for the future. In connected vehicles, the Internet of Vehicles (IoVs) is a promising concept where cars or vehicles can use various communication technologies to communicate with the driver or other entities on the road. In this paper, we explore the future entities in a smart city to which a vehicle can communicate. Moreover, we investigate the importance of warning messages for reducing road transportation issues as IoVs already proved that it could reduce worldwide traffic issues, accident rates, transportation issues, etc. to a particular extent. In spite of several attractive features, ensuring security and lightweight property is one of the challenges in an IoV scenario. Therefore, we propose a Secure Authentication for Future Entities (SAFE) protocol, which uses cryptographic operations for enhancing security and preserving privacy.","PeriodicalId":102892,"journal":{"name":"2019 IEEE Real-Time Systems Symposium (RTSS)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124881936","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2