Work-in-Progress: Probabilistic System-Wide DVFS for Real-Time Embedded Systems

R. Medina, L. Cucu-Grosjean
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引用次数: 2

Abstract

Nowadays, real-time embedded systems are facing concerns like power consumption and increased functionalities demand. Approaches based on Dynamic Voltage and Frequency Scaling (DVFS) reduce the energy consumed by processors while guaranteeing real-time constraints. In this paper, we present short-comings on existing models reducing energy consumption. Our experimental results clearly show that the execution time of tasks is not exclusively proportional to the processor speed. Thus, we believe that DVFS techniques could also be applied to other components like buses and memory. We discuss the applicability of a probabilistic Worst Case Execution Time (WCET) combined with DVFS techniques, and argue that by adopting a probabilistic frequency-aware model, we can (i) capture more detailed behaviors of tasks w.r.t. hardware frequencies and (ii) apply DVFS techniques to gain in energy consumption.
正在进行的工作:实时嵌入式系统的概率系统范围DVFS
当前,实时嵌入式系统面临着功耗和功能需求增加等问题。基于动态电压和频率缩放(DVFS)的方法在保证实时约束的同时减少了处理器的能量消耗。在本文中,我们指出了现有的降低能耗模型的不足之处。我们的实验结果清楚地表明,任务的执行时间并不完全与处理器速度成正比。因此,我们相信DVFS技术也可以应用于其他组件,如总线和内存。我们讨论了概率最坏情况执行时间(WCET)与DVFS技术相结合的适用性,并认为通过采用概率频率感知模型,我们可以(i)在硬件频率下捕获任务的更详细行为,(ii)应用DVFS技术来获得能耗。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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