2019 IEEE Real-Time Systems Symposium (RTSS)最新文献

MCS-IOV: Real-Time I/O Virtualization for Mixed-Criticality Systems MCS-IOV:混合临界系统的实时I/O虚拟化

2019 IEEE Real-Time Systems Symposium (RTSS) Pub Date : 2019-12-01 DOI: 10.1109/RTSS46320.2019.00037

Zhe Jiang, N. Audsley, Pan Dong, Nan Guan, Xiaotian Dai, Lifeng Wei

{"title":"MCS-IOV: Real-Time I/O Virtualization for Mixed-Criticality Systems","authors":"Zhe Jiang, N. Audsley, Pan Dong, Nan Guan, Xiaotian Dai, Lifeng Wei","doi":"10.1109/RTSS46320.2019.00037","DOIUrl":"https://doi.org/10.1109/RTSS46320.2019.00037","url":null,"abstract":"In mixed-criticality systems, timely handling of I/O is a key for the system being successfully implemented and functioning appropriately. The criticality levels of functions and sometimes the whole system are often dependent on the state of the I/O. An I/O system for a MCS must provide simultaneously isolation/separation, performance/efficiency and timing-predictability, as well as being able to manage I/O resource in an adaptive manner to facilitate efficient yet safe resource sharing among components of different criticality levels. Existing approaches cannot achieve all of these requirements simultaneously. This paper presents a MCS I/O management framework, termed MCS-IOV. MCS-IOV is based on hardware assisted virtualisation, which provides temporal and spatial isolation and prohibits fault propagation with small extra overhead in performance. MCS-IOV extends a real-time I/O virtualisation system, by supporting the concept of mixed criticalities and customised interfaces for schedulers, which offers good timing-preditability. MCS-IOV supports I/O driven criticality mode switch (the mode switch can be triggered by detection of unexpected I/O behaviors, e.g., a higher I/O utilization than expected) and timely I/O resource reconfiguration up on that. Finally, We evaluated and demonstrate MCS-IOV in different aspects.","PeriodicalId":102892,"journal":{"name":"2019 IEEE Real-Time Systems Symposium (RTSS)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116988763","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 13

Enabling Predictable, Simultaneous and Coherent Data Sharing in Mixed Criticality Systems 在混合临界系统中实现可预测、同步和一致的数据共享

2019 IEEE Real-Time Systems Symposium (RTSS) Pub Date : 2019-12-01 DOI: 10.1109/RTSS46320.2019.00045

N. Sritharan, A. Kaushik, Mohamed Hassan, Hiren D. Patel

{"title":"Enabling Predictable, Simultaneous and Coherent Data Sharing in Mixed Criticality Systems","authors":"N. Sritharan, A. Kaushik, Mohamed Hassan, Hiren D. Patel","doi":"10.1109/RTSS46320.2019.00045","DOIUrl":"https://doi.org/10.1109/RTSS46320.2019.00045","url":null,"abstract":"Emerging embedded systems deployed in the automotive and avionics domains execute applications with different criticalities, comprising what is known as Mixed Criticality Systems (MCS). Applications in MCS often share data between tasks (coming from sensors for instance). Data sharing is challenging because it can lead to increased response times or even unpredictable behaviors if not carefully addressed. Therefore, several prior works in MCS either assumed that tasks do not share data or disallowed it by design. Recent solutions attempt to mitigate the effects of data sharing, albeit by introducing new restrictions on the system either by prohibiting applications from caching shared data or prohibiting the operating system from running tasks with shared data in parallel. We find these solutions also to have limited applicability as they deteriorate system schedulability and prohibit simultaneous access to shared data. In this paper, we propose PENDULUM: a time-based cache coherence protocol to enable simultaneous and predictable access to shared data in MCS. Our evaluation shows that PENDULUM, achieves flexibility and better performance compared to existing solutions, while maintaining system predictability.","PeriodicalId":102892,"journal":{"name":"2019 IEEE Real-Time Systems Symposium (RTSS)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129437811","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 13

The Colored Refresh Server for DRAM DRAM的彩色刷新服务器

2019 IEEE Real-Time Systems Symposium (RTSS) Pub Date : 2019-12-01 DOI: 10.1109/RTSS46320.2019.00023

Xing Pan, F. Mueller

引用次数: 1

Butterfly Attack: Adversarial Manipulation of Temporal Properties of Cyber-Physical Systems 蝴蝶攻击:网络物理系统时间特性的对抗性操纵

2019 IEEE Real-Time Systems Symposium (RTSS) Pub Date : 2019-12-01 DOI: 10.1109/RTSS46320.2019.00019

Rouhollah Mahfouzi, A. Aminifar, Soheil Samii, Mathias Payer, P. Eles, Zebo Peng

引用次数: 7

CARP: A Data Communication Mechanism for Multi-core Mixed-Criticality Systems CARP:多核混合临界系统的数据通信机制

2019 IEEE Real-Time Systems Symposium (RTSS) Pub Date : 2019-12-01 DOI: 10.1109/RTSS46320.2019.00044

A. Kaushik, Paulos Tegegn, Zhuanhao Wu, Hiren D. Patel

引用次数: 13

Integrated Energy Control for Hard Real-Time Networks-on-Chip 硬实时片上网络集成能量控制

2019 IEEE Real-Time Systems Symposium (RTSS) Pub Date : 2019-12-01 DOI: 10.1109/RTSS46320.2019.00012

Thawra Kadeed, Sebastian Tobuschat, R. Ernst

{"title":"Integrated Energy Control for Hard Real-Time Networks-on-Chip","authors":"Thawra Kadeed, Sebastian Tobuschat, R. Ernst","doi":"10.1109/RTSS46320.2019.00012","DOIUrl":"https://doi.org/10.1109/RTSS46320.2019.00012","url":null,"abstract":"While Networks-on-Chip (NoCs) are the prevalent solution to provide a scalable interconnect for the complex multiprocessing architectures, their associated energy consumptions have immensely increased. Specifically, hard real-time Networks-on-chip must manifest limited energy consumption as reliability issues in such a shared resource jeopardize the whole system safety. In this paper, we propose a safe and efficient approach that allows global and online energy management under temporal guarantees, i.e., all deadlines of critical functions are met. The approach introduces a control-layer to save energy on the NoC data layer through multiple Power-Aware Network Controllers (PANCs). We explore through PANCs the potential efficiency of integrating multiple energy-savings schemes in the face of the diversity of energy dissipation sources. To safely apply the PANCs in hard real-time systems while meeting the deadlines, a formal worst-case timing analysis of the additional latency induced by the control layer is provided. Experimental results demonstrate the diversity of NoC energy-savings under different combinations of energy-savings schemes. Also, the scalability of the approach is provided, inducing small area overhead.","PeriodicalId":102892,"journal":{"name":"2019 IEEE Real-Time Systems Symposium (RTSS)","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130796712","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 5

Design and Dynamic Update of Real-Time Systems 实时系统的设计与动态更新

2019 IEEE Real-Time Systems Symposium (RTSS) Pub Date : 2019-12-01 DOI: 10.1109/RTSS46320.2019.00011

W. Yi

引用次数: 2

Adaptive Real-Time Routing in Polynomial Time 多项式时间的自适应实时路由

2019 IEEE Real-Time Systems Symposium (RTSS) Pub Date : 2019-12-01 DOI: 10.1109/RTSS46320.2019.00034

Kunal Agrawal, Sanjoy Baruah

引用次数: 9

Pipelined Data-Parallel CPU/GPU Scheduling for Multi-DNN Real-Time Inference 多dnn实时推理的流水线数据并行CPU/GPU调度

2019 IEEE Real-Time Systems Symposium (RTSS) Pub Date : 2019-12-01 DOI: 10.1109/RTSS46320.2019.00042

Yecheng Xiang, Hyoseung Kim

{"title":"Pipelined Data-Parallel CPU/GPU Scheduling for Multi-DNN Real-Time Inference","authors":"Yecheng Xiang, Hyoseung Kim","doi":"10.1109/RTSS46320.2019.00042","DOIUrl":"https://doi.org/10.1109/RTSS46320.2019.00042","url":null,"abstract":"Deep neural networks (DNNs) have been showing significant success in various applications, such as autonomous driving, mobile devices, and Internet of Things. Although much research has been conducted to optimize the structure of DNNs, limited attention has been given to their timely execution, specifically on the scheduling of real-time inference requests to various DNN models. For instance, existing DNN frameworks, such as Caffe, TensorFlow and Torch, only provide a single-level priority, one-DNN-per-process execution model and sequential inference interfaces. They can be particularly problematic when used in edge computing and in-vehicle intelligence systems for multiple DNNs, as response time may become unpredictably long in the worst case while leaving system resources underutilized. This paper presents DART, a DNN scheduling framework that offers deterministic response time to real-time tasks and increased throughput to best-effort tasks. DART employs a pipeline-based scheduling architecture with data parallelism, where heterogeneous CPUs and GPUs are arranged into nodes with different parallelism levels. DART also includes pipeline stage design and node configuration schemes, admission control, execution time profiling, and runtime enforcement techniques. We evaluated DART on Intel x86 Xeon and Nvidia ARM platforms with GPUs. Experimental results indicate that DART significantly outperforms the existing approaches, by up to 98.5% shorter worst-case response time for real-time tasks while simultaneously achieving up to 17.9% higher throughput for best-effort tasks.","PeriodicalId":102892,"journal":{"name":"2019 IEEE Real-Time Systems Symposium (RTSS)","volume":"120 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123390797","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 90

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2019 IEEE Real-Time Systems Symposium (RTSS) Pub Date : 2019-12-01 DOI: 10.1109/rtss46320.2019.00001

引用次数: 0