IEEE Open Journal of the Solid-State Circuits Society最新文献

{"title":"Integrated Sense-and-React Countermeasures Against Physical Attacks on Resource-Constrained Security Systems","authors":"Noriyuki Miura","doi":"10.1109/OJSSCS.2026.3652562","DOIUrl":"https://doi.org/10.1109/OJSSCS.2026.3652562","url":null,"abstract":"An integrated sense-and-react countermeasure constitutes a promising hardware-security approach to mitigate malicious physical attacks targeting resource-constrained yet security-critical information systems. An integrated physical-attack sensor detects, in situ, the potential risk of information leakage, and upon detection, an integrated reaction circuit autonomously responds by immediately disabling the attack to protect secret information. To reduce hardware overhead, the sensor and reaction circuits are specifically tailored to the assumed attack surfaces, scenarios, and required security levels. This article presents compact, low-power integrated sensors, and reaction circuits designed to counter both passive side-channel and active fault-injection attacks, such as those exploiting power traces, electromagnetic radiation, and laser-induced faults. Silicon prototypes validate the proposed approach by demonstrating comprehensive attack detection and effective risk mitigation of information leakage, achieved with limited hardware cost, thereby enabling practical deployment in resource-constrained security systems.","PeriodicalId":100633,"journal":{"name":"IEEE Open Journal of the Solid-State Circuits Society","volume":"6 ","pages":"15-24"},"PeriodicalIF":3.2,"publicationDate":"2026-01-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11345479","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146082056","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Beyond Sole Parametric Optimization Design Regimes: Understanding and Advancing the Frontiers of High-Speed ADCs","authors":"Chi-Hang Chan","doi":"10.1109/OJSSCS.2026.3681529","DOIUrl":"https://doi.org/10.1109/OJSSCS.2026.3681529","url":null,"abstract":"Driven by relentless demands for expeditious data acquisition in modern communication systems, radar, and instrumentation, Nyquist analog-to-digital converters (ADCs) have emerged as critical components due to their ability to direct sample and digitize wideband signals at or near the Nyquist rate. Remarkable progress has been made in both sampling rates and energy efficiency in recent decades, thanks to advances in technology scaling, the composite of architecture, and circuit innovations. However, recent research trends often overemphasize a single parameter, such as the figure of merit (FoM), as the primary benchmark of the frontiers, obscuring the actual requirements and purposes of high-speed ADCs in the systems. This article focuses on high-speed Nyquist ADCs, discussing their background, fundamentals, challenges, and reviewing pronounced solutions. It aims to broaden the scope of engineering trends beyond the classic FoM-driven design philosophy.","PeriodicalId":100633,"journal":{"name":"IEEE Open Journal of the Solid-State Circuits Society","volume":"6 ","pages":"93-105"},"PeriodicalIF":3.2,"publicationDate":"2026-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11475736","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147737144","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Review of Energy Efficient Circuits Optimized for Single-Photon Avalanche Diodes in Medical Imaging Applications","authors":"Byungchoul Park;Hyun-Seung Choi;Dongseok Cho;Hyo-Sung Park;Myung-Jae Lee;Youngcheol Chae","doi":"10.1109/OJSSCS.2025.3648964","DOIUrl":"https://doi.org/10.1109/OJSSCS.2025.3648964","url":null,"abstract":"This article presents a review on energy-efficient circuits optimized for single-photon avalanche diodes (SPADs) in medical imaging applications. SPADs enable single-photon detection capability and subnanosecond timing precision, making them highly suitable for various medical applications, such as X-ray imaging, positron emission tomography (PET), and fluorescence lifetime imaging microscopy (FLIM). However, large-area SPAD-based imagers, particularly wafer-scale X-ray detectors, face challenging energy-efficiency requirements, as millions of pixels operate concurrently at high bias voltages above the breakdown voltage, leading to significant power consumption and thermal management requirements. This review highlights various SPAD structures across different fabrication processes, such as frontside illumination (FSI) process, and backside illumination (BSI) process. It also summarizes recent advances in pixel-level front-end circuits that manage the recharge of the SPAD while minimizing power consumption. Furthermore, optimized counter architectures for the SPAD pixel are discussed, with emphasis on extrapolation-based techniques that extend the dynamic range while reducing the overall power consumption of the SPAD-based detectors. By combining these techniques, energy-efficient SPAD-based detectors for medical imaging applications can be realized, where compact integration, thermal management, and patient safety are critical.","PeriodicalId":100633,"journal":{"name":"IEEE Open Journal of the Solid-State Circuits Society","volume":"5 ","pages":"511-523"},"PeriodicalIF":3.2,"publicationDate":"2025-12-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11316338","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146026600","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A Direct Current-to-Digital Converter IC for Luminescence-Based Detection Toward an Energy Efficient Transcutaneous Carbon Dioxide Sensor Wearable","authors":"Tuna B. Tufan;Benjamin Larkin;John McNeill;Ulkuhan Guler","doi":"10.1109/OJSSCS.2025.3646593","DOIUrl":"https://doi.org/10.1109/OJSSCS.2025.3646593","url":null,"abstract":"Continuous monitoring of arterial carbon dioxide is critical for assessing respiratory function and detecting ventilation inefficiencies. Arterial blood gas analysis, the clinical gold standard, is invasive and limited to intermittent measurements in hospital settings. Transcutaneous carbon dioxide sensing offers a noninvasive alternative by measuring carbon dioxide diffusing through the skin, which strongly correlates with arterial carbon dioxide. However, conventional transcutaneous sensors require bulky bedside monitors and heating elements, making them unsuitable for wearable applications. This work presents the first integrated circuit implementation of a ratiometric time-domain dual lifetime referencing technique using a direct current-to-digital converter architecture designed for energy-efficient wearables. The proposed design achieves 0.15-nA/cnt resolution over a 30-<inline-formula> <tex-math>$mu $ </tex-math></inline-formula>A input range at 88-<inline-formula> <tex-math>$mu $ </tex-math></inline-formula>W power consumption. With the proposed I-DAC current-scaling technique, the system maintains a luminescence ratio error of <inline-formula> <tex-math>$le 0.5$ </tex-math></inline-formula>% across a wide input range.","PeriodicalId":100633,"journal":{"name":"IEEE Open Journal of the Solid-State Circuits Society","volume":"5 ","pages":"388-399"},"PeriodicalIF":3.2,"publicationDate":"2025-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11304713","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146026533","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Shared Switched Capacitor Multioutput Hybrid Converter for High Conversion Ratio Applications","authors":"Ratul Das;Hanh-Phuc Le","doi":"10.1109/OJSSCS.2025.3644337","DOIUrl":"https://doi.org/10.1109/OJSSCS.2025.3644337","url":null,"abstract":"This work presents a shared-switched-capacitor multioutput hybrid (SSC-MoH) converter to support large conversion ratios from a 12–24 V input to three separate outputs of 0.8–1.8 V. The 6-switch converter includes a 3X-step-down switched capacitor (SC) front-end that is fully soft-charged and shared by three output inductors. The output voltages are individually regulated using PWM signals from a power-collaborative control (PCC). The chip was manufactured in a 130-nm high-voltage BCD process, achieving a peak efficiency of 87.14%, 30X conversion ratio, and 11.93-W peak output power in system evaluation.","PeriodicalId":100633,"journal":{"name":"IEEE Open Journal of the Solid-State Circuits Society","volume":"6 ","pages":"3-14"},"PeriodicalIF":3.2,"publicationDate":"2025-12-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11300850","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146082147","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A 75-pJ/bit 435-MHz 16-QAM Modulator With 20-ns Startup Time and Symbol-Level Duty Cycling for Capsule Endoscopy","authors":"Donghyun Youn;Daehyeon Kwon;Minkyu Je","doi":"10.1109/OJSSCS.2025.3644839","DOIUrl":"https://doi.org/10.1109/OJSSCS.2025.3644839","url":null,"abstract":"Wireless capsule endoscopy requires simultaneous support of ultralow-power operation and high data rate to enable long diagnostic time and reliable image transmission. To support both design requirements, this work presents a 75-pJ/bit 435-MHz modulator for 16 quadrature amplitude modulation (16-QAM) with aggressive symbol-level duty cycling (SLDC). An SLDC is supported by a fast startup technique, which enhances duty cycling efficiency. During startup, the proposed technique minimizes transient DC error components at the modulator input, which results in fast settling of the output envelope. A fully on-chip auto calibration detects and corrects this error without impacting modulator performance. The calibration is fully digital, scalable, and robust against process, voltage, and temperature variations. After the calibration process, the modulator exhibits a 20-ns startup time. Even with 50% SLDC, a data rate of 20 Mb/s is achieved with −8-dBm average output power and 1.6-mW power consumption. Combining spectrum-efficient QAM and SLDC, this work satisfies both low-power and high-data-rate requirements for wireless medical capsule endoscopy (WMCE).","PeriodicalId":100633,"journal":{"name":"IEEE Open Journal of the Solid-State Circuits Society","volume":"5 ","pages":"354-364"},"PeriodicalIF":3.2,"publicationDate":"2025-12-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11300849","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146026630","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"ATC-Tx: A 21.9 pJ/Sa 110 μW Direct Pixel-to-PWM Converter and Time-Domain Body Communication Transmitter for Video Sensor Nodes","authors":"Gourab Barik;Samyadip Sarkar;Baibhab Chatterjee;Gaurav K. Kumar;Shreyas Sen","doi":"10.1109/OJSSCS.2025.3642795","DOIUrl":"https://doi.org/10.1109/OJSSCS.2025.3642795","url":null,"abstract":"With the rapid advancement of the Internet of Things (IoT) and its expanding applications in health monitoring, body-worn cameras, and smart glasses, the demand for high data rate (DR) video transmission and compact device size has become critical. This shift has necessitated the development of low-power communication systems and battery-efficient or battery-less designs. Traditional high-data-rate communication methods consume mWs of power, such as Wi-Fi and backscatter communication (for high DRs, higher transmitter power is required to handle the two-fold path loss between the transmitter and sensor node), and require converting analog information into digital bits before transmission. These approaches rely on analog-to-digital converters (ADCs), which generate substantial data volumes, resulting in increased storage and processing demands while consuming significant power <inline-formula> <tex-math>$P_{text {ADC}} propto 2^{N};(text {exponential}) $ </tex-math></inline-formula>, where <inline-formula> <tex-math>$N$ </tex-math></inline-formula> is the number of bits. Consequently, communication power increases <inline-formula> <tex-math>$P_{text {comm}} propto N;(text {linearly})$ </tex-math></inline-formula>, resulting in overall higher power consumption. To address these challenges and reduce the communication energy of a video sensor node (VSN) while enabling a more compact form factor, we propose an analog voltage-to-time converter for VSN (ATC-Tx) that exploits a novel time-domain mode of body communication. This system directly converts analog video information into pulse-width modulated signals for transmission, leveraging the wideband characteristics of the human body communication (HBC) channel as the transmission medium. This approach enables low-power sensing and communication by eliminating the need for ADCs and digitization at energy-constrained VSNs. The ATC-Tx achieves an energy efficiency of 21.9 pJ/Sa, leveraging time-domain body communication (TD-BC), which results in a two-order-of-magnitude improvement over existing commercial off-the-shelf (COTS) components. This improvement is accompanied by a <inline-formula> <tex-math>$sim 3times $ </tex-math></inline-formula> reduction in power consumption compared to the previous voltage mode electro-quasistatic HBC (EQS-HBC)-based implementation, as well as significant reductions in implementation area.","PeriodicalId":100633,"journal":{"name":"IEEE Open Journal of the Solid-State Circuits Society","volume":"5 ","pages":"335-353"},"PeriodicalIF":3.2,"publicationDate":"2025-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11293787","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146026532","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"An Implantable Peripheral Nerve Interface System With Simultaneous Multisite Data Transmission via Galvanically Coupled Body-Channel Communication for Next-Generation Prosthetic Limbs","authors":"Dong-Hwi Choi;Dongyoon Lee;Yunchul Chung;Hyunyeop Lee;Kim Hoang Nguyen;Byeongseon Choi;Gichan Yun;Sohmyung Ha;Minkyu Je","doi":"10.1109/OJSSCS.2025.3642787","DOIUrl":"https://doi.org/10.1109/OJSSCS.2025.3642787","url":null,"abstract":"This article presents a neural implant system for prosthetic limbs that enables simultaneous multisite data transmission via galvanically coupled body-channel communication (GC-BCC) for fine, low-latency control. Ultrasound and RF uplinks typically require multiple-access schemes to avoid collisions across implants. Capacitive BCC can support simultaneous links, but the small, motion-variant return-path capacitance reduces channel gain and undermines robustness. In contrast, GC-BCC forms a closed-loop current path for each transmitter–receiver pair via a dedicated termination, enabling simultaneous uplinks without multiple-access scheme. Implemented in 180-nm CMOS, the system integrates a 16-channel neural recording analog front end, a GC-BCC transceiver, and low-dropout regulators. Through 15-mm porcine tissue, the link sustains a 20-Mb/s data rate with a bit-error rate below <inline-formula> <tex-math>$1.3 times 10^{-5}$ </tex-math></inline-formula>. Two GC-BCC transceivers operate simultaneously with 100-<inline-formula> <tex-math>$Omega $ </tex-math></inline-formula> termination with negligible crosstalk at <inline-formula> <tex-math>$geq 1.6$ </tex-math></inline-formula>-cm spacing. The measured energy efficiencies are 20.35 pJ/bit for the transmitter and 467.4 pJ/bit for the receiver.","PeriodicalId":100633,"journal":{"name":"IEEE Open Journal of the Solid-State Circuits Society","volume":"5 ","pages":"324-334"},"PeriodicalIF":3.2,"publicationDate":"2025-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11293770","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146026601","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A 0.5 nJ/Conversion Self-Resetting Energy-Autonomous Multi-Node Temperature Sensor With Hybrid Energy Harvesting","authors":"Joanne Si Ying Tan;Zhuoyue Li;Chne-Wuen Tsai;Jeong Hoan Park;Jiamin Li;Yilong Dong;Kwok Hoe Chan;Ghim Wei Ho;Jerald Yoo","doi":"10.1109/OJSSCS.2025.3642796","DOIUrl":"https://doi.org/10.1109/OJSSCS.2025.3642796","url":null,"abstract":"This article presents an energy-autonomous, self-resetting (SR), and multi-node temperature sensor powered by hybrid energy harvesting (EH). The ultralow leakage self-adaptive full bridge rectifier (SA-FBR) accepts any hybrid EH source at both sparse and abundant inputs and suppresses the leakage by <inline-formula> <tex-math>$1000times $ </tex-math></inline-formula>. The dynamic power management unit (D-PMU) enables event-driven wake-up capability that allows for 97.3% power saving during standby mode. The 0.5 nJ/conversion temperature sensor in <inline-formula> <tex-math>$0.18~mu $ </tex-math></inline-formula>m CMOS uses active SR, spike-based coding to achieve the widest measurement range of –<inline-formula> <tex-math>$10~^{circ }$ </tex-math></inline-formula>C to <inline-formula> <tex-math>$110~^{circ }$ </tex-math></inline-formula>C to date.","PeriodicalId":100633,"journal":{"name":"IEEE Open Journal of the Solid-State Circuits Society","volume":"5 ","pages":"377-387"},"PeriodicalIF":3.2,"publicationDate":"2025-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11293796","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146026603","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Single-Trim Highly Accurate Frequency Reference Techniques","authors":"Thomas J. Hoen;Alexander S. Delke;Yanyu Jin;Jos Verlinden;Bram Nauta;Anne-Johan Annema","doi":"10.1109/OJSSCS.2025.3636845","DOIUrl":"https://doi.org/10.1109/OJSSCS.2025.3636845","url":null,"abstract":"This article describes a CMOS frequency reference system that achieves quartz-crystal-oscillator-rivaling frequency accuracy and power consumption across a temperature range of 228 °C, with low degradation over lifetime. This system uses only a batch calibration and a sample-specific single-temperature production-time calibration. The reference frequency is generated by a tunable RC-based oscillator (RCO) at relatively low power. The RCO’s significant process and temperature dependencies, and degradation over lifetime, are eliminated by periodically recalibrating it to a co-integrated inherently robust LC-oscillator (LCO). The resulting hybrid RC/LC CMOS frequency reference system combines the low-power properties of the RCO and the single-trim highly accurate and low-aging properties of an LCO. This article reviews circuit and system aspects of this frequency reference system, complemented with measurement results and insights for key devices and for many effects that limit system accuracy over wide temperature ranges and over lifetime.","PeriodicalId":100633,"journal":{"name":"IEEE Open Journal of the Solid-State Circuits Society","volume":"5 ","pages":"481-496"},"PeriodicalIF":3.2,"publicationDate":"2025-11-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11268377","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146026599","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}