{"title":"eButton: A Wearable Computer for Health Monitoring and Personal Assistance.","authors":"Mingui Sun, Lora E Burke, Zhi-Hong Mao, Yiran Chen, Hsin-Chen Chen, Yicheng Bai, Yuecheng Li, Chengliu Li, Wenyan Jia","doi":"10.1145/2593069.2596678","DOIUrl":"10.1145/2593069.2596678","url":null,"abstract":"<p><p>Recent advances in mobile devices have made profound changes in people's daily lives. In particular, the impact of easy access of information by the smartphone has been tremendous. However, the impact of mobile devices on healthcare has been limited. Diagnosis and treatment of diseases are still initiated by occurrences of symptoms, and technologies and devices that emphasize on disease prevention and early detection outside hospitals are under-developed. Besides healthcare, mobile devices have not yet been designed to fully benefit people with special needs, such as the elderly and those suffering from certain disabilities, such blindness. In this paper, an overview of our research on a new wearable computer called eButton is presented. The concepts of its design and electronic implementation are described. Several applications of the eButton are described, including evaluating diet and physical activity, studying sedentary behavior, assisting the blind and visually impaired people, and monitoring older adults suffering from dementia.</p>","PeriodicalId":87346,"journal":{"name":"Proceedings. Design Automation Conference","volume":"2014 ","pages":"1-6"},"PeriodicalIF":0.0,"publicationDate":"2014-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.ncbi.nlm.nih.gov/pmc/articles/PMC4203446/pdf/nihms-606059.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"32766511","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Clock tree synthesis with methodology of re-use in 3D IC","authors":"Fu-Wei Chen, TingTing Hwang","doi":"10.1145/2228360.2228559","DOIUrl":"https://doi.org/10.1145/2228360.2228559","url":null,"abstract":"IP reuse methodology has been used extensively in SoC (System on Chip) design. In this reuse methodology, while design and implementation cost is saved, manufacturing cost is not. To further reduce the cost, this reuse concept has been proposed at mask and die level in three-dimension integrated circuit (3D IC). In order to achieve manufacturing reuse, in this paper, we propose a new methodology to design a global clock tree in 3D IC. The objective is to extend an existing clock tree in 2D IC to 3D IC taking into consideration the wirelength, clock skew and the number of TSVs. Compared with NNG-based method, our proposed method reduces the wirelength of the new die and skew of the global 3D clock tree, on an average, 47.16% and 5.85%, respectively.","PeriodicalId":87346,"journal":{"name":"Proceedings. Design Automation Conference","volume":"26 1","pages":"1094-1099"},"PeriodicalIF":0.0,"publicationDate":"2012-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84165544","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Big.LITTLE system architecture from ARM: saving power through heterogeneous multiprocessing and task context migration","authors":"B. Jeff","doi":"10.1145/2228360.2228569","DOIUrl":"https://doi.org/10.1145/2228360.2228569","url":null,"abstract":"","PeriodicalId":87346,"journal":{"name":"Proceedings. Design Automation Conference","volume":"55 1","pages":"1143-1146"},"PeriodicalIF":0.0,"publicationDate":"2012-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75948974","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Michael Gester, D. Müller, T. Nieberg, Christian Panten, C. Schulte, J. Vygen
{"title":"Algorithms and data structures for fast and good VLSI routing","authors":"Michael Gester, D. Müller, T. Nieberg, Christian Panten, C. Schulte, J. Vygen","doi":"10.1145/2228360.2228441","DOIUrl":"https://doi.org/10.1145/2228360.2228441","url":null,"abstract":"We present advanced data structures and algorithms for fast and high-quality global and detailed routing in modern technologies. Global routing is based on a combinatorial approximation scheme for min-max resource sharing. Detailed routing uses exact shortest path algorithms, based on a shape-based data structure for pin access and a two-level track-based data structure for long-distance connections. All algorithms are very fast. We demonstrate their superiority over traditional approaches by a comparison to an industrial router (on 32nm and 22nm chips). Our router is over two times faster, has 5% less netlength, 20% less vias, and reduces detours by more than 90%.","PeriodicalId":87346,"journal":{"name":"Proceedings. Design Automation Conference","volume":"57 1","pages":"459-464"},"PeriodicalIF":0.0,"publicationDate":"2012-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"89569093","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Methodology for Pipeline Route Selection Using the NSGA II and Distance Transform Algorithms","authors":"Sigurjon N. Kjaernested, M. Jónsson, H. Pálsson","doi":"10.1115/DETC2011-47766","DOIUrl":"https://doi.org/10.1115/DETC2011-47766","url":null,"abstract":"","PeriodicalId":87346,"journal":{"name":"Proceedings. Design Automation Conference","volume":"30 1","pages":"543-552"},"PeriodicalIF":0.0,"publicationDate":"2011-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"91397411","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Young-Jin Yoon, Nicola Concer, M. Petracca, L. Carloni
{"title":"Virtual channels vs. multiple physical networks: A comparative analysis","authors":"Young-Jin Yoon, Nicola Concer, M. Petracca, L. Carloni","doi":"10.1145/1837274.1837315","DOIUrl":"https://doi.org/10.1145/1837274.1837315","url":null,"abstract":"Packet-switched networks-on-chip (NoC) have been proposed as an efficient communication infrastructure for multi-core architectures. Adding virtual channels to a NoC helps to avoid deadlock and optimize the bandwidth of the physical channels in exchange for a more complex design of the routers. Another, possibly alternative, approach is to build multiple parallel physical networks (multi-planes) with smaller channels and simpler router organizations. We present a comparative analysis of these two approaches based on analytical models and on a comprehensive set of experimental results including both synthesized hardware implementations and system-level simulations.","PeriodicalId":87346,"journal":{"name":"Proceedings. Design Automation Conference","volume":"295 1","pages":"162-165"},"PeriodicalIF":0.0,"publicationDate":"2010-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75653538","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Thomas Harms, Juan-Antonio Caraballo, Reynold D'Sa, R. Haring, Derek Urbaniak, Guntram Wolski, James You
{"title":"Joint user track panel (Session 11U) — What will make your next design experience a much better one?","authors":"Thomas Harms, Juan-Antonio Caraballo, Reynold D'Sa, R. Haring, Derek Urbaniak, Guntram Wolski, James You","doi":"10.1145/1837274.1837459","DOIUrl":"https://doi.org/10.1145/1837274.1837459","url":null,"abstract":"Top designers and design engineering managers will present this wish list to make their next (or even current) design a much better design experience. They will not focus on pie-in-the-sky research topics, but describe down-to-earth challenges that designers face in getting their designs out the door. The panelists will use their data and experiences to substantiate their wish lists and address the main question: What needs to change in the design flows and design tools to improve Time-to-Market (TTM) and design quality?","PeriodicalId":87346,"journal":{"name":"Proceedings. Design Automation Conference","volume":"31 1","pages":"730-730"},"PeriodicalIF":0.0,"publicationDate":"2010-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75483422","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Robust design methods for hardware accelerators for iterative algorithms in scientific computing","authors":"A. Kinsman, N. Nicolici","doi":"10.1145/1837274.1837339","DOIUrl":"https://doi.org/10.1145/1837274.1837339","url":null,"abstract":"The ubiquity of embedded systems of increasing complexity in domains like scientific computing requires computation on models whose complexity has grown beyond what is economical to manage purely in software to requiring hardware acceleration - a key part of which is selecting numerical data representations (bit-width allocation). To address the shortcomings of existing techniques when applied to scientific computing dataflows, we propose a methodology for determining custom hybrid fixed/floating-point data representations for iterative scientific computing applications.","PeriodicalId":87346,"journal":{"name":"Proceedings. Design Automation Conference","volume":"12 1","pages":"254-257"},"PeriodicalIF":0.0,"publicationDate":"2010-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75555194","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
P. Wohl, J. Waicukauski, Frederic Neuveux, Emil Gizdarski
{"title":"Fully X-tolerant, very high scan compression","authors":"P. Wohl, J. Waicukauski, Frederic Neuveux, Emil Gizdarski","doi":"10.1145/1837274.1837366","DOIUrl":"https://doi.org/10.1145/1837274.1837366","url":null,"abstract":"This paper presents a new X-blocking system which allows very high compression and full coverage even if the density of unknown values is very high and varies every shift. Despite the presence of Xs in scan cells, compression can be maximized by using PRPG and MISR structures. Results on industrial designs with various X densities demonstrate consistently high compression and full test coverage.","PeriodicalId":87346,"journal":{"name":"Proceedings. Design Automation Conference","volume":"51 1","pages":"362-367"},"PeriodicalIF":0.0,"publicationDate":"2010-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77857158","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}