Bo-Yuan Huang, Sayak Ray, Aarti Gupta, Jason M. Fung, S. Malik
{"title":"Formal security verification of concurrent firmware in SoCs using instruction-level abstraction for hardware","authors":"Bo-Yuan Huang, Sayak Ray, Aarti Gupta, Jason M. Fung, S. Malik","doi":"10.1109/DAC.2018.8465794","DOIUrl":"https://doi.org/10.1109/DAC.2018.8465794","url":null,"abstract":"","PeriodicalId":87346,"journal":{"name":"Proceedings. Design Automation Conference","volume":"159 1","pages":"91:1-91:6"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75968341","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
D. Prasad, S. Sinha, B. Cline, S. Moore, A. Naeemi
{"title":"Accurate processor-level wirelength distribution model for technology pathfinding using a modernized interpretation of rent's rule","authors":"D. Prasad, S. Sinha, B. Cline, S. Moore, A. Naeemi","doi":"10.1109/DAC.2018.8465803","DOIUrl":"https://doi.org/10.1109/DAC.2018.8465803","url":null,"abstract":"","PeriodicalId":87346,"journal":{"name":"Proceedings. Design Automation Conference","volume":"83 6 1","pages":"28:1-28:6"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79663653","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Joanna Tess Masilungan-Manuel, A. Soriano, M. Manuel, P. Lin
{"title":"Simulation and Design Optimization of a Tall-Form Spray Dryer","authors":"Joanna Tess Masilungan-Manuel, A. Soriano, M. Manuel, P. Lin","doi":"10.1115/DETC2017-67372","DOIUrl":"https://doi.org/10.1115/DETC2017-67372","url":null,"abstract":"","PeriodicalId":87346,"journal":{"name":"Proceedings. Design Automation Conference","volume":"31 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2017-08-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"91396976","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Shakya Sur, A. Mahmoud, A. E. Khabbazi, E. Pavlov, A. Bilton
{"title":"Computational Modeling and Field Evaluation of an Innovative Solar Updraft Aeration System for Aquaculture in the Developing World","authors":"Shakya Sur, A. Mahmoud, A. E. Khabbazi, E. Pavlov, A. Bilton","doi":"10.1115/DETC2016-59572","DOIUrl":"https://doi.org/10.1115/DETC2016-59572","url":null,"abstract":"","PeriodicalId":87346,"journal":{"name":"Proceedings. Design Automation Conference","volume":"16 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2016-08-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"91397532","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Machine Learning and Metamodel-Based Design Optimization of Nonlinear Multimaterial Structures","authors":"Kai Liu, D. Detwiler, A. Tovar","doi":"10.1115/DETC2016-60471","DOIUrl":"https://doi.org/10.1115/DETC2016-60471","url":null,"abstract":"","PeriodicalId":87346,"journal":{"name":"Proceedings. Design Automation Conference","volume":"16 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2016-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"91397897","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Invited - Can IoT be secured: emerging challenges in connecting the unconnected","authors":"Nancy Cam-Winget, A. Sadeghi, Yier Jin","doi":"10.1145/2897937.2905004","DOIUrl":"https://doi.org/10.1145/2897937.2905004","url":null,"abstract":"","PeriodicalId":87346,"journal":{"name":"Proceedings. Design Automation Conference","volume":"46 1","pages":"122:1-122:6"},"PeriodicalIF":0.0,"publicationDate":"2016-06-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85702205","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Proceedings - Design Automation Conference","authors":"Zhiheng Wang, N. Saraf, K. Bazargan, A. Scheel","doi":"10.1145/2744769.2744898","DOIUrl":"https://doi.org/10.1145/2744769.2744898","url":null,"abstract":"Stochastic Computing (SC) is a digital computation approach that operates on random bit streams to perform complex tasks with much smaller hardware footprints compared to conventional approaches that employ binary radix. For stochastic logic to work, the input random bit streams have to be independent, which is a challenge when implementing systems with feedback: outputs that are generated based on input bit streams would be correlated to those streams and cannot be readily combined as inputs to stochastic logic for another iteration of the function. We propose re-randomization techniques for stochastic computing and use the Logistic Map x → r x(1-x) as a case study for dynamical systems in general. We show that complex behaviors such as period-doubling and chaos do indeed occur in digital logic with only a few gates operating on a few 0's and 1's. We employ a number of techniques such as random number generator sharing and using table-lookup pre-computations to significantly reduce the total energy of the computation. Compared to the conventional binary approach, we achieve between 8% and 25% energy consumption.","PeriodicalId":87346,"journal":{"name":"Proceedings. Design Automation Conference","volume":"78 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2015-07-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74091091","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Thermal Implications of On-Chip Voltage Regulation: Upcoming Challenges and Possible Solutions","authors":"S. Kose","doi":"10.1145/2593069.2593231","DOIUrl":"https://doi.org/10.1145/2593069.2593231","url":null,"abstract":"The primary objective of this paper is to investigate and evaluate the thermal implications of high power density on-chip voltage regulators. This paper is a first attempt to highlight the importance of the number, size, and location of on-chip voltage regulators on the thermal hotspots and thermal gradient. The physical location of on-chip voltage regulators is explored to distribute the hotspot locations and achieve spatial low pass filtering of the hotspots. A new thermal-aware physical design and power management technique are proposed to spatially and temporally distribute the hotspot locations over the cooler areas within an integrated circuit. The proposed technique eliminates the thermal gradient due to on-chip voltage regulators without any performance loss.","PeriodicalId":87346,"journal":{"name":"Proceedings. Design Automation Conference","volume":"47 1","pages":"1-6"},"PeriodicalIF":0.0,"publicationDate":"2014-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"91539849","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}