Proceedings. Design Automation Conference最新文献

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Muffin: A Framework Toward Multi-Dimension AI Fairness by Uniting Off-the-Shelf Models. 松饼:通过整合现成模型实现多维度人工智能公平性的框架。
Proceedings. Design Automation Conference Pub Date : 2023-07-01 Epub Date: 2023-09-15 DOI: 10.1109/dac56929.2023.10247765
Yi Sheng, Junhuan Yang, Lei Yang, Yiyu Shi, Jingtong Hu, Weiwen Jiang
{"title":"Muffin: A Framework Toward Multi-Dimension AI Fairness by Uniting Off-the-Shelf Models.","authors":"Yi Sheng, Junhuan Yang, Lei Yang, Yiyu Shi, Jingtong Hu, Weiwen Jiang","doi":"10.1109/dac56929.2023.10247765","DOIUrl":"https://doi.org/10.1109/dac56929.2023.10247765","url":null,"abstract":"<p><p>Model fairness (a.k.a., bias) has become one of the most critical problems in a wide range of AI applications. An unfair model in autonomous driving may cause a traffic accident if corner cases (e.g., extreme weather) cannot be fairly regarded; or it will incur healthcare disparities if the AI model misdiagnoses a certain group of people (e.g., brown and black skin). In recent years, there are emerging research works on addressing unfairness, and they mainly focus on a single unfair attribute, like skin tone; however, real-world data commonly have multiple attributes, among which unfairness can exist in more than one attribute, called \"multi-dimensional fairness\". In this paper, we first reveal a strong correlation between the different unfair attributes, i.e., optimizing fairness on one attribute will lead to the collapse of others. Then, we propose a novel Multi-Dimension Fairness framework, namely <i>Muffin,</i> which includes an automatic tool to unite off-the-shelf models to improve the fairness on multiple attributes simultaneously. Case studies on dermatology datasets with two unfair attributes show that the existing approach can achieve 21.05% fairness improvement on the first attribute while it makes the second attribute unfair by 1.85%. On the other hand, the proposed <i>Muffin</i> can unite multiple models to achieve simultaneously 26.32% and 20.37% fairness improvement on both attributes; meanwhile, it obtains 5.58% accuracy gain.</p>","PeriodicalId":87346,"journal":{"name":"Proceedings. Design Automation Conference","volume":"2023 ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2023-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.ncbi.nlm.nih.gov/pmc/articles/PMC10987014/pdf/","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140871692","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10 - 14, 2022 DAC '22:第59届ACM/IEEE设计自动化会议,美国加利福尼亚州旧金山,2022年7月10日至14日
Proceedings. Design Automation Conference Pub Date : 2022-01-01 DOI: 10.1145/3489517
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引用次数: 0
General Chair's Message 主席致辞
Proceedings. Design Automation Conference Pub Date : 2021-12-05 DOI: 10.1109/dac18074.2021.9586182
Harry Foster
{"title":"General Chair's Message","authors":"Harry Foster","doi":"10.1109/dac18074.2021.9586182","DOIUrl":"https://doi.org/10.1109/dac18074.2021.9586182","url":null,"abstract":"Through the efforts of the chairs and members of the technical program committees of the preceding years’ symposiums, ATS has become a technical meeting which is being paid increasing attention by the world testing community. This is manifested by the falct that the number of citations of ATS papers has increased. This is also partly manifested by the fact that the number of countries and regions from which the ATS ‘96 papem were submitted has increased to 19, which includes almost every major country and region of the world. So this year, you would find that we have a good technical program. We believe that, through the continued development and booming in economy in the Asian region, this trend will continue. Through the continued efforts of the sponsoring chairs and organizations in the coming years, ATS will eventually become one of the major technical conferences in testing.","PeriodicalId":87346,"journal":{"name":"Proceedings. Design Automation Conference","volume":"50 1","pages":"1"},"PeriodicalIF":0.0,"publicationDate":"2021-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84707875","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Exploiting Computation Reuse for Stencil Accelerators. 开发模板加速器的计算重用。
Proceedings. Design Automation Conference Pub Date : 2020-07-01 Epub Date: 2020-10-09 DOI: 10.1109/dac18072.2020.9218680
Yuze Chi, Jason Cong
{"title":"Exploiting Computation Reuse for Stencil Accelerators.","authors":"Yuze Chi,&nbsp;Jason Cong","doi":"10.1109/dac18072.2020.9218680","DOIUrl":"https://doi.org/10.1109/dac18072.2020.9218680","url":null,"abstract":"<p><p>Stencil kernel is an important type of kernel used extensively in many application domains. Over the years, researchers have been studying the optimizations on parallelization, communication reuse, and computation reuse for various target platforms. However, challenges still exist, especially on the computation reuse problem for accelerators, due to the lack of complete design-space exploration and effective design-space pruning. In this paper, we present solutions to the above challenges for a wide range of stencil kernels (i.e., stencil with reduction operations), where the computation reuse patterns are extremely flexible due to the commutative and associative properties. We formally define the complete design space, based on which we present a provably optimal dynamic programming algorithm and a heuristic beam search algorithm that provides near-optimal solutions under an architecture-aware model. Experimental results show that for synthesizing stencil kernels to FPGAs, compared with state-of-the-art stencil compiler without computation reuse capability, our proposed algorithm can reduce the look-up table (LUT) and digital signal processor (DSP) usage by 58.1% and 54.6% on average respectively, which leads to an average speedup of 2.3× for compute-intensive kernels, outperforming the latest CPU/GPU results.</p>","PeriodicalId":87346,"journal":{"name":"Proceedings. Design Automation Conference","volume":"2020 ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/dac18072.2020.9218680","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"25540972","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Modelling multicore contention on the AURIXTM TC27x 在AURIXTM TC27x上建模多核争用
Proceedings. Design Automation Conference Pub Date : 2018-06-01 DOI: 10.1109/DAC.2018.8465780
Enrique Díaz, E. Mezzetti, Leonidas Kosmidis, J. Abella, F. Cazorla
{"title":"Modelling multicore contention on the AURIXTM TC27x","authors":"Enrique Díaz, E. Mezzetti, Leonidas Kosmidis, J. Abella, F. Cazorla","doi":"10.1109/DAC.2018.8465780","DOIUrl":"https://doi.org/10.1109/DAC.2018.8465780","url":null,"abstract":"Multicores are becoming ubiquitous in automotive. Yet, the expected benefits on integration are challenged by multicore contention concerns on timingV&V.Worst-case execution time (WCET) estimates are required as early as possible in the software development, to enable prompt detection of timing misbehavior. Factoring in multicore contention necessarily builds on conservative assumptions on interference, independent of co-runners load on shared hardware. We propose a contention model for automotive multicores that balances time-composability with tightness by exploiting available information on contenders. We tailor the model to the AURIX TC27x and provide tightWCET estimates using information from performance monitors and software configurations.","PeriodicalId":87346,"journal":{"name":"Proceedings. Design Automation Conference","volume":"83 1","pages":"97:1-97:6"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73552664","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 15
Protecting the supply chain for automotives and IoTs 保护汽车和物联网供应链
Proceedings. Design Automation Conference Pub Date : 2018-06-01 DOI: 10.1109/DAC.2018.8465878
S. Ray, Wen Chen, Rosario Cammarota
{"title":"Protecting the supply chain for automotives and IoTs","authors":"S. Ray, Wen Chen, Rosario Cammarota","doi":"10.1109/DAC.2018.8465878","DOIUrl":"https://doi.org/10.1109/DAC.2018.8465878","url":null,"abstract":"Modern automotive systems and IoT devices are designed through a highly complex, globalized, and potentially untrustworthy supply chain. Each player in this supply chain may (1) introduce sensitive information and data (collectively termed “assets”) that must be protected from other players in the supply chain, and (2) have controlled access to assets introduced by other players. Furthermore, some players in the supply chain may be malicious. It is imperative to protect the device and any sensitive assets in it from being compromised or unknowingly disclosed by such entities. A key – and sometimes overlooked – component of security architecture of modern electronic systems entails managing security in the face of supply chain challenges. In this paper we discuss some security challenges in automotive and IoT systems arising from supply chain complexity, and the state of the practice in this area.","PeriodicalId":87346,"journal":{"name":"Proceedings. Design Automation Conference","volume":"1 1","pages":"89:1-89:4"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"88575376","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
RAIN: a tool for reliability assessment of interconnect networks - physics to software 用于互连网络可靠性评估的工具——从物理到软件
Proceedings. Design Automation Conference Pub Date : 2018-06-01 DOI: 10.1109/DAC.2018.8465800
A. Abbasinasab, M. Marek-Sadowska
{"title":"RAIN: a tool for reliability assessment of interconnect networks - physics to software","authors":"A. Abbasinasab, M. Marek-Sadowska","doi":"10.1109/DAC.2018.8465800","DOIUrl":"https://doi.org/10.1109/DAC.2018.8465800","url":null,"abstract":"","PeriodicalId":87346,"journal":{"name":"Proceedings. Design Automation Conference","volume":"23 1","pages":"133:1-133:6"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75495977","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Efficient multi-layer obstacle-avoiding region-to-region rectilinear steiner tree construction 高效的多层避障区域到区域的直线斯坦纳树构造
Proceedings. Design Automation Conference Pub Date : 2018-06-01 DOI: 10.1109/DAC.2018.8465783
Run-Yi Wang, C. Pai, Jun-Jie Wang, Hsiang-Ting Wen, Yu-Cheng Pai, Yao-Wen Chang, Chien-Mo James Li, J. H. Jiang
{"title":"Efficient multi-layer obstacle-avoiding region-to-region rectilinear steiner tree construction","authors":"Run-Yi Wang, C. Pai, Jun-Jie Wang, Hsiang-Ting Wen, Yu-Cheng Pai, Yao-Wen Chang, Chien-Mo James Li, J. H. Jiang","doi":"10.1109/DAC.2018.8465783","DOIUrl":"https://doi.org/10.1109/DAC.2018.8465783","url":null,"abstract":"","PeriodicalId":87346,"journal":{"name":"Proceedings. Design Automation Conference","volume":"13 1","pages":"45:1-45:6"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74721240","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
COSAT: congestion, obstacle, and slew aware tree construction for multiple power domain design COSAT:基于多功率域设计的拥塞、障碍和回转感知树构建
Proceedings. Design Automation Conference Pub Date : 2018-06-01 DOI: 10.1109/DAC.2018.8465899
Chien-Pang Lu, I. Jiang
{"title":"COSAT: congestion, obstacle, and slew aware tree construction for multiple power domain design","authors":"Chien-Pang Lu, I. Jiang","doi":"10.1109/DAC.2018.8465899","DOIUrl":"https://doi.org/10.1109/DAC.2018.8465899","url":null,"abstract":"","PeriodicalId":87346,"journal":{"name":"Proceedings. Design Automation Conference","volume":"20 1","pages":"47:1-47:6"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73874197","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
PlanarONoC: concurrent placement and routing considering crossing minimization for optical networks-on-chip PlanarONoC:考虑交叉最小化的片上光网络并发布局和路由
Proceedings. Design Automation Conference Pub Date : 2018-06-01 DOI: 10.1109/DAC.2018.8465775
Yu-Kai Chuang, Kuan-Jung Chen, Kun-Lin Lin, Shao-Yun Fang, Bing Li, Ulf Schlichtmann
{"title":"PlanarONoC: concurrent placement and routing considering crossing minimization for optical networks-on-chip","authors":"Yu-Kai Chuang, Kuan-Jung Chen, Kun-Lin Lin, Shao-Yun Fang, Bing Li, Ulf Schlichtmann","doi":"10.1109/DAC.2018.8465775","DOIUrl":"https://doi.org/10.1109/DAC.2018.8465775","url":null,"abstract":"","PeriodicalId":87346,"journal":{"name":"Proceedings. Design Automation Conference","volume":"34 1","pages":"151:1-151:6"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90786751","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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