Power electronic devices and components最新文献

{"title":"Projecting GaN HEMTs lifetimes under typical stresses commonly observed in DC-DC converters","authors":"Shengke Zhang,&nbsp;Siddhesh Gajare,&nbsp;Ricardo Garcia,&nbsp;Sijun Huang,&nbsp;Angel Espinoza,&nbsp;Andrea Gorgerino,&nbsp;Ruizhe Zhang,&nbsp;Alejandro Pozo,&nbsp;Robert Strittmatter,&nbsp;Alex Lidow","doi":"10.1016/j.pedc.2023.100051","DOIUrl":"https://doi.org/10.1016/j.pedc.2023.100051","url":null,"abstract":"<div><p>DC-DC converters exist in virtually every application of modern power electronics. Due to small die size, low on-resistance, and low parasitic capacitance, GaN power devices offer superior conversion efficiency and record-setting power density. In this paper, test-to-fail methodology is adopted to investigate the intrinsic wear-out mechanisms such as would be experienced in common DC-DC converters. Devices are stressed under gate bias, drain bias, and temperature cycling individually. The lifetime of each stressor is therefore projected based on the physics-based model developed from test-to-fail and an understanding of the unique stress conditions in DC-DC converters.</p></div>","PeriodicalId":74483,"journal":{"name":"Power electronic devices and components","volume":"6 ","pages":"Article 100051"},"PeriodicalIF":0.0,"publicationDate":"2023-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.sciencedirect.com/science/article/pii/S2772370423000196/pdfft?md5=dd8234762f0cb426238dbe0b06a2df9e&pid=1-s2.0-S2772370423000196-main.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"138413266","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Effect of plasma process on n-GaN surface probed with electrochemical short loop","authors":"Carole Pernel,&nbsp;William Berthou,&nbsp;Sidharth Suman,&nbsp;Simon Ruel,&nbsp;Laura Vauche","doi":"10.1016/j.pedc.2023.100041","DOIUrl":"10.1016/j.pedc.2023.100041","url":null,"abstract":"<div><p>Plasma etching treatments are important steps in GaN-based devices fabrication, but can create defects on GaN surfaces. These surface defects can strongly alter device performances. The main objective of this work is to characterize the impact of different plasma etching recipes using an innovative electrochemical short loop based on Mott-Schottky (MS) method. The effect of defects has been studied in terms of Fermi Level pinning. Barrier height has been identified as a relevant criteria to describe surface damage induced by plasma treatment. Probing Conventional LETI plasma etching process with the Mott-Schottky method demonstrates a good reproducibility of the electrochemical data and confirms the reliability of the developed method. Various electrochemical tests conducted on 3 plasmas recipes demonstrated that: 1) the RIE etching is damaging, 2) the optimized RIE (Steady A) is less damaging than the other RIE (Steady B) and 3) the RIE associated with ALE process shows the least damaging plasma recipe, as expected.</p></div>","PeriodicalId":74483,"journal":{"name":"Power electronic devices and components","volume":"6 ","pages":"Article 100041"},"PeriodicalIF":0.0,"publicationDate":"2023-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"48463833","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"An experimental study on switching waveform design with gate charge control for power MOSFETs","authors":"Hirotaka Oomori,&nbsp;Ichiro Omura","doi":"10.1016/j.pedc.2023.100043","DOIUrl":"10.1016/j.pedc.2023.100043","url":null,"abstract":"<div><p>Designing switching waveforms is a technique for mitigating a trade-off between loss and noise in switching power devices. A novel and simple method has been proposed to compute the gate waveform to realize a designed switching waveform. The gate current pulse is calculated to eliminate the deviation between the designed target waveform and the observed waveform at the moment using a linear combination of drain-source voltage or drain current responses to a small gate charge pulse train. In this paper, a verification system including a simple gate current pulse generator consisting of operational amplifiers and transistors was built together with a conventional voltage source gate driver, and validation of the proposed method was experimentally performed using the drain-source voltage waveform of a Si MOSFET during the turn-off phase. Applying the obtained drain-source voltage responses to the proposed method, the gate current pulse to be added to realize a given target waveform was calculated and superimposed on the output of the gate driver. The measured drain-source voltage waveform was well-matched to the target. In addition, the impact of the drain current values on the design of the drain-source waveform was verified.</p></div>","PeriodicalId":74483,"journal":{"name":"Power electronic devices and components","volume":"6 ","pages":"Article 100043"},"PeriodicalIF":0.0,"publicationDate":"2023-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"46644271","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"MOSFET Selection for a 18ka modular power converter for HL-LHC inner triplet","authors":"N. Wassinger ,&nbsp;S. Maestri ,&nbsp;R. Garcia Retegui ,&nbsp;M. Funes ,&nbsp;P. Antoszczuk ,&nbsp;S. Pittet","doi":"10.1016/j.pedc.2023.100048","DOIUrl":"https://doi.org/10.1016/j.pedc.2023.100048","url":null,"abstract":"<div><p>The upgrade of the Large Hadron Collider (LHC) at CERN towards the High Luminosity-LHC (HL-LHC) presents different challenges, among them, the upgrade of the power converters associated to the inner triplet magnets to reach the required rated current of <span><math><mrow><mn>18</mn><mtext>kA</mtext></mrow></math></span>. In order to reach this current and to accomplish the stringent requirements associated to this kind of application, even under a fault scenario, redundancy and modularity are foreseen in the converter design. Consequently, the development of a <span><math><mrow><mn>18</mn><mtext>kA</mtext></mrow></math></span>/<span><math><mrow><mo>±</mo><mn>10</mn><mi>V</mi></mrow></math></span> power converter built from 10 parallel-connected sub-converters, each consisting of <span><math><mi>M</mi></math></span> modules, is carried out. Additionally, due to the converter being installed in an underground gallery, most of the heat must be extracted by using a water cooling system. Therefore, the reduction of power losses and an appropriate thermal design become key factors. These requirements, together with the large number of devices associated with the parallelization-based modular system, determine the choice of switching semiconductor devices as an important aspect in the design of the converter. This paper presents the process carried out for the choice of semiconductor devices based on analysis of power losses, thermal behavior and integration complexity. In this process, multiple variants in terms of semiconductor, number of modules, parallelization of devices, and switching frequency are considered. The proper operation of the selected device was verified on a 2kA sub-converter prototype based on the interconnection of 9 MOSFET based modules.</p></div>","PeriodicalId":74483,"journal":{"name":"Power electronic devices and components","volume":"6 ","pages":"Article 100048"},"PeriodicalIF":0.0,"publicationDate":"2023-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.sciencedirect.com/science/article/pii/S2772370423000160/pdfft?md5=580e9f30853db1abbf9dba4f060bf446&pid=1-s2.0-S2772370423000160-main.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"92046597","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Nanoscale thinning of metal-coated polypropylene films by Helium-ion irradiation","authors":"Shova Neupane ,&nbsp;Serguei Chiriaev ,&nbsp;William Greenbank ,&nbsp;Odysseas Gkionis-Konstantatos ,&nbsp;Till Leissner ,&nbsp;Thomas Ebel ,&nbsp;Luciana Tavares","doi":"10.1016/j.pedc.2023.100046","DOIUrl":"https://doi.org/10.1016/j.pedc.2023.100046","url":null,"abstract":"<div><p>Polypropylene (PP) films have a wide range of applications, e.g. as dielectric materials for metallized film capacitors. In this article, we present a method for thickness reduction of PP films by ion irradiation, which has a direct effect on device capacitance. We show that the thickness of PP layers can be reduced by irradiation with He⁺ ions and controlled on the nanometer scale by the irradiation dose. The effect of different thin metal film coatings on PP surface was also investigated. The metal coatings were used for two reasons: they function as one of the metal electrodes in the capacitor structure, and they minimize sample charging during ion irradiation. Three different metallization materials were investigated: 5 nm Pt₆₀Pd₄₀, 5 nm Au, and 15 nm Al. We studied two technologically relevant PP films: the thinnest commercially available biaxially oriented polypropylene (BOPP) and spin-coated polypropylene (SC-PP) thin films. The irradiation was done with a focused Helium-ion beam (He-FIB) in a Zeiss Orion NanoFab Microscope at a landing energy of 30 keV with doses in a range of 5.4 × 10^–5 nC/μm² to 8.1 × 10^–3 nC/μm². An atomic force microscope (AFM) was used to analyze the details of surface modification: the surface height of the irradiated regions and surface morphology changes caused by the irradiation. For all applied doses, the Al-coated samples demonstrated smaller surface-height reduction compared to the Pt₆₀Pd₄₀ and Au-coated samples. We speculate that the possible factors responsible for this effect include differences in the thickness and the crystalline-grain orientation (texture) of the metallization films. Both BOPP and spin-coated PP presented surface ridges at the borders between the irradiated and non-irradiated regions. It can be attributed to the mechanical strain induced by the material modification.</p></div>","PeriodicalId":74483,"journal":{"name":"Power electronic devices and components","volume":"6 ","pages":"Article 100046"},"PeriodicalIF":0.0,"publicationDate":"2023-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"49745815","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Life-cycle energy demand comparison of medium voltage Silicon IGBT and Silicon Carbide MOSFET power semiconductor modules in railway traction applications","authors":"Lucas Barroso Spejo ,&nbsp;Innocent Akor ,&nbsp;Munaf Rahimo ,&nbsp;Renato Amaral Minamisawa","doi":"10.1016/j.pedc.2023.100050","DOIUrl":"https://doi.org/10.1016/j.pedc.2023.100050","url":null,"abstract":"<div><p>Power semiconductors process roughly 70 % of global energy, with a higher percentage expected as worldwide transport electrification, renewables and wide-band-gap (WBG) semiconductors are implemented, significantly affecting global energy savings. This manuscript evaluates the cumulative energy demand (CED) encompassing the manufacture and use-phase in a railway traction application of silicon (Si) and silicon carbide (SiC) power semiconductor modules. Realistic manufacturing data from a power semiconductor fab has been considered for 3.3 kV/450 A state-of-the-art Si and SiC LinPak modules. SiC devices presented around 2.6 – 3.8× higher CED per area than Si devices in the manufacturing phase. However, due to the considerably smaller SiC chip area per ampere required, a 1.1 – 1.6× lower grey energy than Si technology is estimated. For the first time, such analysis is based on specialized power semiconductor fab data for both technologies and provides a baseline for the life cycle energy assessment of power electronics systems. Besides, the use-phase energy losses were evaluated for a realistic railway application, considering an operational lifetime of 30 years. The module manufacturing energy is negligible compared to the use-phase stage. Furthermore, the SiC technology presented an estimated energy-saving potential of 24 MWh/lifetime per module compared to the Si device.</p></div>","PeriodicalId":74483,"journal":{"name":"Power electronic devices and components","volume":"6 ","pages":"Article 100050"},"PeriodicalIF":0.0,"publicationDate":"2023-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.sciencedirect.com/science/article/pii/S2772370423000184/pdfft?md5=c9eabbadc44e9325c045e520ae757d21&pid=1-s2.0-S2772370423000184-main.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134657153","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Quality assessment and lifetime prediction of base metal electrode multilayer ceramic capacitors: Challenges and opportunities","authors":"Pedram Yousefian,&nbsp;Clive A. Randall","doi":"10.1016/j.pedc.2023.100045","DOIUrl":"https://doi.org/10.1016/j.pedc.2023.100045","url":null,"abstract":"<div><p>Base metal electrode (BME) multilayer ceramic capacitors (MLCCs) are widely used in aerospace, medical, military, and communication applications, emphasizing the need for high reliability. The ongoing advancements in BaTiO₃-based MLCC technology have facilitated further miniaturization and improved capacitive volumetric density for both low and high voltage devices. However, concerns persist regarding infant mortality failures and long-term reliability under higher fields and temperatures. To address these concerns, a comprehensive understanding of the mechanisms underlying insulation resistance degradation is crucial. Furthermore, there is a need to develop effective screening procedures during MLCC production and improve the accuracy of mean time to failure (MTTF) predictions. This article reviews our findings on the effect of the burn-in test, a common quality control process, on the dynamics of oxygen vacancies within BME MLCCs. These findings reveal the burn-in test has a negative impact on the lifetime and reliability of BME MLCCS. Moreover, the limitations of existing lifetime prediction models for BME MLCCs are discussed, emphasizing the need for improved MTTF predictions by employing a physics-based machine learning model to overcome the existing models’ limitations. The article also discusses the new physical-based machine learning model that has been developed. While data limitations remain a challenge, the physics-based machine learning approach offers promising results for MTTF prediction in MLCCs, contributing to improved lifetime predictions. Furthermore, the article acknowledges the limitations of relying solely on MTTF to predict MLCCs’ lifetime and emphasizes the importance of developing comprehensive prediction models that predict the entire distribution of failures.</p></div>","PeriodicalId":74483,"journal":{"name":"Power electronic devices and components","volume":"6 ","pages":"Article 100045"},"PeriodicalIF":0.0,"publicationDate":"2023-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"49745813","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Over-current low voltage ride-through operation of grid-connected converters based on thermal analysis","authors":"Jiashi Wang,&nbsp;Mengqi Xu,&nbsp;Yuhao Qi,&nbsp;Ke Ma,&nbsp;Cai Xu","doi":"10.1016/j.pedc.2023.100044","DOIUrl":"https://doi.org/10.1016/j.pedc.2023.100044","url":null,"abstract":"<div><p>The grid-connected converters are becoming an important role in modern power grid. The grid codes have been proposed for the operation of grid-connected converters. The low voltage ride-through, namely one of the grid codes, is the operation of grid-connected converters under grid fault. The reactive power is generated by gird-connected converters to support grid under low voltage ride-through operation. However, the maximum reactive power is restricted by the capacity of converter, which is designed for long-term operation. Since the low voltage ride-through is a short-term operation, the maximum output reactive power can be enhanced. An over-current low voltage ride-through operation is proposed, and it is designed based on the maximum short-term capacity. The maximum short-term capacity is designed to ensure the junction temperature of semiconductor devices in the converter under the reliable operation, which is calculated based on thermal analysis. Furthermore, the different approaches to enhancing the maximum short-term capacity is analyzed.</p></div>","PeriodicalId":74483,"journal":{"name":"Power electronic devices and components","volume":"6 ","pages":"Article 100044"},"PeriodicalIF":0.0,"publicationDate":"2023-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"49762225","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Estimation of remaining useful lifetime of power electronic components with machine learning based on mission profile data","authors":"Darshankumar Bhat ,&nbsp;Stefan Muench ,&nbsp;Mike Roellig","doi":"10.1016/j.pedc.2023.100040","DOIUrl":"https://doi.org/10.1016/j.pedc.2023.100040","url":null,"abstract":"<div><p>Reliability of power electronic components is essential to functionality and safety. In this paper, a data-driven method is presented to estimate the remaining useful lifetime of solder joints used in power modules of electric bikes. Temperature mission profile data is acquired from the electric bikes under different loading conditions and key temperature features are generated. Accumulated creep strains in solder joint of a chip resistor are evaluated by finite element analysis. A machine learning model, namely multilayer perceptron is first trained with the synthetically generated data from finite element analysis. The model is further introduced to creep strains generated under mission profile data by transfer learning methods. Results show that machine learning model trained with combination of mission profile and synthetic data has high accuracy with just 6.7% average error against unseen field data. Remaining useful lifetime is then evaluated based on predicted accumulated creep strains. This methodology provides a viable solution for real-time remaining useful lifetime estimation based on combination of synthetic and real-world data.</p></div>","PeriodicalId":74483,"journal":{"name":"Power electronic devices and components","volume":"5 ","pages":"Article 100040"},"PeriodicalIF":0.0,"publicationDate":"2023-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"49736046","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Hybrid model to evaluate the frequency-dependent leakage inductance of partially-filled transformers","authors":"Angshuman Sharma,&nbsp;Jonathan W. Kimball","doi":"10.1016/j.pedc.2023.100038","DOIUrl":"10.1016/j.pedc.2023.100038","url":null,"abstract":"<div><p>The leakage inductance of a transformer designed for a power electronic converter can drop significantly as the switching frequency is increased due to skin and proximity effects. Although the magnetic image method-based double-2-D model can predict the low-frequency leakage inductance of a partially-filled transformer with sufficient accuracy, it is inherently a frequency-independent model. While Dowell’s 1-D model uses frequency-dependent relations to account for both skin and proximity effects, its accuracy is severely affected by the assumed winding geometry. In this paper, a semi-analytical hybrid model is proposed that uses superposition to combine a modified Dowell’s model with the double-2-D model to predict the true leakage inductance of partially-filled transformers at any given frequency. All three conductor types—round, foil, and litz wire—are modeled and analyzed. The quasi-2-D model is further investigated on a variable inductance transformer (VIT) whose winding geometry can be modified mechanically to vary its leakage inductance. With less than 5% error throughout, the semi-analytically evaluated leakage inductances are in excellent agreement with the finite element method (FEM) simulated and experimentally measured leakage inductances.</p></div>","PeriodicalId":74483,"journal":{"name":"Power electronic devices and components","volume":"5 ","pages":"Article 100038"},"PeriodicalIF":0.0,"publicationDate":"2023-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"44886218","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}