Effect of plasma process on n-GaN surface probed with electrochemical short loop

Power electronic devices and components Pub Date : 2023-10-01 Epub Date: 2023-06-29 DOI:10.1016/j.pedc.2023.100041
Carole Pernel, William Berthou, Sidharth Suman, Simon Ruel, Laura Vauche
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引用次数: 0

Abstract

Plasma etching treatments are important steps in GaN-based devices fabrication, but can create defects on GaN surfaces. These surface defects can strongly alter device performances. The main objective of this work is to characterize the impact of different plasma etching recipes using an innovative electrochemical short loop based on Mott-Schottky (MS) method. The effect of defects has been studied in terms of Fermi Level pinning. Barrier height has been identified as a relevant criteria to describe surface damage induced by plasma treatment. Probing Conventional LETI plasma etching process with the Mott-Schottky method demonstrates a good reproducibility of the electrochemical data and confirms the reliability of the developed method. Various electrochemical tests conducted on 3 plasmas recipes demonstrated that: 1) the RIE etching is damaging, 2) the optimized RIE (Steady A) is less damaging than the other RIE (Steady B) and 3) the RIE associated with ALE process shows the least damaging plasma recipe, as expected.

Abstract Image

等离子体工艺对电化学短回路n-GaN表面探测的影响
等离子蚀刻处理是GaN基器件制造的重要步骤,但会在GaN表面产生缺陷。这些表面缺陷会极大地改变器件的性能。本工作的主要目的是利用基于Mott-Schottky (MS)方法的创新电化学短回路来表征不同等离子体刻蚀配方的影响。从费米能级的角度研究了缺陷的影响。屏障高度已被确定为描述等离子体处理引起的表面损伤的相关标准。用Mott-Schottky法探测传统的LETI等离子体刻蚀过程,结果表明电化学数据具有良好的再现性,证实了该方法的可靠性。对3种等离子体配方进行的各种电化学测试表明:1)RIE蚀刻具有破坏性,2)优化的RIE(稳定A)比其他RIE(稳定B)的破坏性更小,3)与ALE工艺相关的RIE显示出最小的等离子体配方,正如预期的那样。
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来源期刊
Power electronic devices and components
Power electronic devices and components Hardware and Architecture, Electrical and Electronic Engineering, Atomic and Molecular Physics, and Optics, Safety, Risk, Reliability and Quality
CiteScore
2.00
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0.00%
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80 days
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