Power electronic devices and components最新文献

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Analysis of a novel packaging technique for natural voltage balancing of series-connected SiC-MOSFETs 一种新型串联sic - mosfet自然电压平衡封装技术分析
Power electronic devices and components Pub Date : 2025-05-15 DOI: 10.1016/j.pedc.2025.100097
Luciano F.S. Alves, Pierre Lefranc, Jean-Christophe Crebier, Pierre-Olivier Jeannin, Benoit Sarrazin
{"title":"Analysis of a novel packaging technique for natural voltage balancing of series-connected SiC-MOSFETs","authors":"Luciano F.S. Alves,&nbsp;Pierre Lefranc,&nbsp;Jean-Christophe Crebier,&nbsp;Pierre-Olivier Jeannin,&nbsp;Benoit Sarrazin","doi":"10.1016/j.pedc.2025.100097","DOIUrl":"10.1016/j.pedc.2025.100097","url":null,"abstract":"<div><div>This paper analyzes a novel packaging technique to improve the voltage-sharing performances of series-connected SiC-MOSFETs. The proposed method takes advantage of the parasitic capacitance network introduced by the packaging dielectric isolation layers to reduce the voltage imbalance across the series-connected devices. Firstly, the study carried out in this work explains how the parasitic capacitance networks introduced by the classic planar packaging and the gate drive circuits cause voltage imbalances across the devices. Therefore, a new packaging concept is analyzed to compensate for the effects of the gate driver parasitic capacitances. The concept is introduced and analyzed using equivalent models and mathematical approaches. To verify the analysis, the voltage sharing between two series-connected 1.2 kV SiC-MOSFETs is tested in a pulse test setup. The experimental results confirm that the proposed voltage-balancing technique can drastically improve the voltage-sharing performance of series-connected devices.</div></div>","PeriodicalId":74483,"journal":{"name":"Power electronic devices and components","volume":"11 ","pages":"Article 100097"},"PeriodicalIF":0.0,"publicationDate":"2025-05-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144105980","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Impact of voids on the solder joint integrity and fatigue life of IGBT power module 空隙对IGBT电源模块焊点完整性和疲劳寿命的影响
Power electronic devices and components Pub Date : 2025-05-15 DOI: 10.1016/j.pedc.2025.100098
Sunday E. Nebo, Emeka H. Amalu, David J. Hughes
{"title":"Impact of voids on the solder joint integrity and fatigue life of IGBT power module","authors":"Sunday E. Nebo,&nbsp;Emeka H. Amalu,&nbsp;David J. Hughes","doi":"10.1016/j.pedc.2025.100098","DOIUrl":"10.1016/j.pedc.2025.100098","url":null,"abstract":"<div><div>Insulated gate bipolar transistor (IGBT) power module is a key component of actuator devices in many systems which include electric vehicles (EVs). However, as the deployment of IGBT modules penetrates several mission-critical systems operating in harsher ambient, process voids in the solder joints challenge their reliability and fatigue life. This investigation quantifies the impact of presence of 10% voids in critical solder joints on the integrity and fatigue-life of IGBT module for reliable field operation. Computational modelling utilising python programming algorithm deployed in Monte-Carlo technique is used to generate realist distributions of spatial random voids on three representative volume elements (RVEs) of critical solder joints in three IGBT modules. The three modules have elliptical voids, spherical voids and a combination of elliptical and spherical voids, respectively. A fourth control module has no void. Solder joints in the models comprises 96.5% tin, 3.0% silver, and 0.5% copper (SAC305). The IEC 60068-2-14 temperature load cycle and Anand’s visco-plastic model are employed as the load and constitutive model, respectively. Other component materials are modelled with appropriate time and temperature dependent models and material properties. Combined elliptical and spherical voids induced the highest damage while elliptical voids induced the highest plastic strain of 0.045 µm/µm magnitude in the joints. Accumulated stress and strain energy have magnitudes of 74.05 MPa and 2.63 × 10<sup>5</sup> pJ, respectively. Ten percent elliptical voids in the joints reduced the fatigue life of the module by 59.5%.</div></div>","PeriodicalId":74483,"journal":{"name":"Power electronic devices and components","volume":"11 ","pages":"Article 100098"},"PeriodicalIF":0.0,"publicationDate":"2025-05-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144106058","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Construction and electrical properties of 700 V aluminium polymer electrolytic capacitors 700 V聚合物铝电解电容器的结构和电性能
Power electronic devices and components Pub Date : 2025-05-03 DOI: 10.1016/j.pedc.2025.100096
Tim Kruse , Luciana Tavares , Ulrich Schürmann , Lorenz Kienle , Thomas Ebel
{"title":"Construction and electrical properties of 700 V aluminium polymer electrolytic capacitors","authors":"Tim Kruse ,&nbsp;Luciana Tavares ,&nbsp;Ulrich Schürmann ,&nbsp;Lorenz Kienle ,&nbsp;Thomas Ebel","doi":"10.1016/j.pedc.2025.100096","DOIUrl":"10.1016/j.pedc.2025.100096","url":null,"abstract":"<div><div>A process for the construction of a high voltage aluminium polymer electrolytic capacitor with operation voltages of up to 700 V is presented in this paper. Thin 150 <span><math><mi>μ</mi></math></span>m, high purity aluminium films are anodized at a constant voltage with various anodization steps in a dilute boric acid solution to voltages between 1000 V and 1500 V. Single capacitor stacks were built, using the anodized aluminium, commercial cathode foils, paper separator and a PEDOT:PSS electrolyte. The resulting capacitors were electrically characterized by their capacitance, equivalent series resistance, breakdown voltage, and leakage current. Capacitance measurements showed that the thickness of the oxide film grew linearly with the forming voltage. The breakdown voltage exhibits a saturation behaviour with rising forming voltages, meaning that thicker oxide grown at voltages higher than 1000 V does not lead to proportional higher breakdown voltages. Oxide investigations showed that many defects are present at the surface at the highest forming voltages. Cross sections showed that the oxide underneath these defects have many voids that presumably lead to an earlier breakdown. Nonetheless, at a forming voltage of 1500 V, the breakdown voltage of the capacitor cells is at an average of 789 V with some samples going up to 800 V, which is more than three times the rated voltage of state-of-the-art devices.</div></div>","PeriodicalId":74483,"journal":{"name":"Power electronic devices and components","volume":"11 ","pages":"Article 100096"},"PeriodicalIF":0.0,"publicationDate":"2025-05-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143908240","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Low leakage and high blocking voltage GaN-on-GaN Schottky diode by TMAH surface treatment 低漏高阻电压GaN-on-GaN肖特基二极管的TMAH表面处理
Power electronic devices and components Pub Date : 2025-04-23 DOI: 10.1016/j.pedc.2025.100092
Vishwajeet Maurya , Daniel Alquier , Hala El Rammouz , Pedro Fernandes Paes Pinto Rocha , Thomas Kaltsounis , Eugénie Martinez , Florian Bartoli , Eric Frayssinet , Yvon Cordier , Matthew Charles , Julien Buckley
{"title":"Low leakage and high blocking voltage GaN-on-GaN Schottky diode by TMAH surface treatment","authors":"Vishwajeet Maurya ,&nbsp;Daniel Alquier ,&nbsp;Hala El Rammouz ,&nbsp;Pedro Fernandes Paes Pinto Rocha ,&nbsp;Thomas Kaltsounis ,&nbsp;Eugénie Martinez ,&nbsp;Florian Bartoli ,&nbsp;Eric Frayssinet ,&nbsp;Yvon Cordier ,&nbsp;Matthew Charles ,&nbsp;Julien Buckley","doi":"10.1016/j.pedc.2025.100092","DOIUrl":"10.1016/j.pedc.2025.100092","url":null,"abstract":"<div><div>In this study, the impact of surface treatment by TMAH and HF on the electrical characteristics of GaN-on-GaN Schottky diodes is examined through I–V and C–V characterizations. A TMAH surface treatment leads to an improvement in the reverse characteristics of the devices and improvement in breakdown voltage (BV) by almost 200 V compared to HF treatment. Additional XPS characterizations reveal a reduction in both O and C concentration from the surface due to TMAH treatment. When combined with proper edge termination techniques, this approach can help achieve breakdown voltages that are closer to the theoretical limits.</div></div>","PeriodicalId":74483,"journal":{"name":"Power electronic devices and components","volume":"11 ","pages":"Article 100092"},"PeriodicalIF":0.0,"publicationDate":"2025-04-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143881837","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
GaN half-bridges on electrical and thermal co-designed ceramic substrates 在电和热共同设计的陶瓷衬底上的氮化镓半桥
Power electronic devices and components Pub Date : 2025-04-17 DOI: 10.1016/j.pedc.2025.100091
Manuel Rueß , Peter Mack , Dominik Koch , Aline Reck , Mathias C.J. Weiser , André Zimmermann , Ingmar Kallfass
{"title":"GaN half-bridges on electrical and thermal co-designed ceramic substrates","authors":"Manuel Rueß ,&nbsp;Peter Mack ,&nbsp;Dominik Koch ,&nbsp;Aline Reck ,&nbsp;Mathias C.J. Weiser ,&nbsp;André Zimmermann ,&nbsp;Ingmar Kallfass","doi":"10.1016/j.pedc.2025.100091","DOIUrl":"10.1016/j.pedc.2025.100091","url":null,"abstract":"<div><div>This work presents an analysis of an electrically and thermally optimized GaN half-bridge module based on ceramic a substrate. An effective thermal and electrical co-design is a decisive factor in achieving high efficiency and power density. In order to utilize the advantages of both GaN for high switching frequencies and ceramic substrates for excellent thermal properties, an electrical and thermal co-designed substrate stack-up for MHz applications is presented. This stack-up features a <span><math><mrow><mn>40</mn><mspace></mspace><mi>μ</mi></mrow></math></span>m thin ceramic layer resulting in a measured power loop inductance of <span><math><mrow><msub><mrow><mi>L</mi></mrow><mrow><mtext>loop,VNA</mtext></mrow></msub><mo>=</mo><mn>489</mn><mspace></mspace><mstyle><mi>p</mi><mi>H</mi></mstyle></mrow></math></span> and a ceramic carrier for an electrically isolated and thermally optimized connection to the heat sink. In a 48<!--> <!-->V to 24<!--> <!-->V buck converter switching at frequencies of up to 2 MHz, a difference in efficiency of 1% is achieved compared to a electrically enhanced rigid-flex substrate using a <span><math><mrow><mn>25</mn><mspace></mspace><mi>μ</mi></mrow></math></span>m polyimide layer. At a switching frequency of 500<!--> <!-->kHz, a power density of <span><math><mrow><mn>1</mn><mspace></mspace><msup><mrow><mtext>kW/cm</mtext></mrow><mrow><mn>3</mn></mrow></msup></mrow></math></span> is achieved with an efficiency of over 95%, accompanied by the possibility of significantly improving the thermal resistance with an all-ceramic stack-up, which enables GaN half-bridges with high frequencies and power densities.</div></div>","PeriodicalId":74483,"journal":{"name":"Power electronic devices and components","volume":"11 ","pages":"Article 100091"},"PeriodicalIF":0.0,"publicationDate":"2025-04-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143879310","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Design and performance evaluation of low-voltage solid-state DCCB using capacitor-based surge mitigation techniques 使用基于电容的浪涌缓解技术的低压固态DCCB的设计和性能评估
Power electronic devices and components Pub Date : 2025-04-16 DOI: 10.1016/j.pedc.2025.100095
Mehdi Moradian , Tek Tjing Lie , Kosala Gunawardane
{"title":"Design and performance evaluation of low-voltage solid-state DCCB using capacitor-based surge mitigation techniques","authors":"Mehdi Moradian ,&nbsp;Tek Tjing Lie ,&nbsp;Kosala Gunawardane","doi":"10.1016/j.pedc.2025.100095","DOIUrl":"10.1016/j.pedc.2025.100095","url":null,"abstract":"<div><div>This article conducts practical tests on four different configurations of solid-state DC circuit breakers (SS-DCCBs), investigating fault detection and circuit interruption phenomena in DC systems. It analyses circuit formulations and design principles, compares the topologies, and evaluates results. Since all circuit operation results are considered acceptable, the article scrutinizes circuit configurations and selects the most effective surge absorption technique based on active and passive components and surge mitigation complexity. The primary switch in the proposed models is a MOSFET, while the bypass switches are IGBT and Thyristor. The traditional surge absorption method using Metal Oxide Varistor (MOV) is contrasted with three topologies employing the capacitor current block technique (CBT). Practical testing and discussion of the effects of circuit inductance on switching speed and operation are also included. Real-world modeling incorporating inductance on both the line and load sides is utilized throughout all experiments to assess realistic outcomes. The optimal surge absorption configuration will be chosen based on its ability to meet various criteria, including efficient operation, rapid response, minimal complexity on both power and control sides, and the involvement of active and passive components. The tests were carried out on a system with a <em>48</em> V DC supply.</div></div>","PeriodicalId":74483,"journal":{"name":"Power electronic devices and components","volume":"11 ","pages":"Article 100095"},"PeriodicalIF":0.0,"publicationDate":"2025-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143844970","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Monolithic integration of circuits in e-mode GaN HEMT technology 电子模GaN HEMT技术中电路的单片集成
Power electronic devices and components Pub Date : 2025-04-09 DOI: 10.1016/j.pedc.2025.100089
Plinio Bau, Thanh Hai Phung, Stephane Driussi, Thomas Beauchene
{"title":"Monolithic integration of circuits in e-mode GaN HEMT technology","authors":"Plinio Bau,&nbsp;Thanh Hai Phung,&nbsp;Stephane Driussi,&nbsp;Thomas Beauchene","doi":"10.1016/j.pedc.2025.100089","DOIUrl":"10.1016/j.pedc.2025.100089","url":null,"abstract":"<div><div>This work presents a power transistor with monolithically integrated gate driver and auxiliary circuit in the same GaN-on-Si die. It presents the design, the characterization and validation tests in a PCB similarly to a final application for this device. The target application is for USB-C chargers and power supplies for data centers. The technology is 650 V pGaN with Schottky gate. Simulation from -40 to 150 °C are performed and also fabrication process variation analysis (SS, FF) compared to typical values (TT).</div></div>","PeriodicalId":74483,"journal":{"name":"Power electronic devices and components","volume":"11 ","pages":"Article 100089"},"PeriodicalIF":0.0,"publicationDate":"2025-04-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143838438","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Stress control in trench field-plate power MOSFETs and its impact on on-resistance reduction 沟道场-板功率 MOSFET 的应力控制及其对降低电阻的影响
Power electronic devices and components Pub Date : 2025-04-06 DOI: 10.1016/j.pedc.2025.100090
Hiroaki Kato , Shin-ichi Nishizawa , Wataru Saito
{"title":"Stress control in trench field-plate power MOSFETs and its impact on on-resistance reduction","authors":"Hiroaki Kato ,&nbsp;Shin-ichi Nishizawa ,&nbsp;Wataru Saito","doi":"10.1016/j.pedc.2025.100090","DOIUrl":"10.1016/j.pedc.2025.100090","url":null,"abstract":"<div><div>The limitations regarding lateral cell pitch narrowing and on-resistance reduction were investigated. Trench field plate MOSFETs feature deep trenches with thick oxide films. This disrupts the stress balance, leading to significant wafer warpage, which poses a critical challenge in device integration. Stress control has become essential for enabling cell pitch narrowing, achieving high breakdown voltage device designs, and implementing innovative device pattern layouts such as dot pattern cell structures. In this study, stress and wafer warpage associated with lateral cell pitch narrowing were estimated using 3D simulations. Based on these results, the on-resistance reduction limit was also estimated through analytical models. For stripe pattern cell structures, pitch narrowing was constrained by both increased wafer warpage and on-resistance saturation. Notably, the X-direction wafer warpage was identified as the limiting factor for pitch narrowing in high breakdown voltage device designs. In contrast, the dot pattern cell structure significantly reduced wafer warpage and allowed narrower pitches compared to the stripe pattern, despite a weakened mobility enhancement effect.</div></div>","PeriodicalId":74483,"journal":{"name":"Power electronic devices and components","volume":"11 ","pages":"Article 100090"},"PeriodicalIF":0.0,"publicationDate":"2025-04-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143829032","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
On the origin of off-state leakage current in n-p-n vertical structures for GaN-based trench-MOSFETs 氮化镓基沟槽mosfet n-p-n垂直结构中失态漏电流的来源
Power electronic devices and components Pub Date : 2025-03-28 DOI: 10.1016/j.pedc.2025.100086
Maciej Kamiński , Kamil Abendroth , Aneta Gołębiowska , Aleksander Szczepański , Krzysztof Urbanowski , Ernest Brzozowski , Jarosław Tarenko , Oskar Sadowski , Justyna Wierzbicka , Renata Kruszka , Kamil Kosiel , Joanna Jankowska-Śliwińska , Iwona Jóźwik , Anna Szerling , Krystian Król , Paweł Prystawko , Michał Boćkowski , Izabella Grzegory , Andrzej Taube
{"title":"On the origin of off-state leakage current in n-p-n vertical structures for GaN-based trench-MOSFETs","authors":"Maciej Kamiński ,&nbsp;Kamil Abendroth ,&nbsp;Aneta Gołębiowska ,&nbsp;Aleksander Szczepański ,&nbsp;Krzysztof Urbanowski ,&nbsp;Ernest Brzozowski ,&nbsp;Jarosław Tarenko ,&nbsp;Oskar Sadowski ,&nbsp;Justyna Wierzbicka ,&nbsp;Renata Kruszka ,&nbsp;Kamil Kosiel ,&nbsp;Joanna Jankowska-Śliwińska ,&nbsp;Iwona Jóźwik ,&nbsp;Anna Szerling ,&nbsp;Krystian Król ,&nbsp;Paweł Prystawko ,&nbsp;Michał Boćkowski ,&nbsp;Izabella Grzegory ,&nbsp;Andrzej Taube","doi":"10.1016/j.pedc.2025.100086","DOIUrl":"10.1016/j.pedc.2025.100086","url":null,"abstract":"<div><div>In this work, we present the results of research on the off-current mechanism in vertical trench MOS devices manufactured on an ammonothermal substrate. Transistors and npn diode test structures were characterized electrically as well as by SEM and by AFM, which results compared to CAD simulations. We demonstrate that while Mg reactivation is a high-temperature process that enhances the ability to block high voltages, it also introduces killer defects that can degenerate structures. Additionally, we observed that the leakage current at the edges of the mesa has minimal significance. The findings highlight that substrate quality is a crucial factor in preventing killer defect formation and likely in minimizing leakage current at the npn epitaxial stack and off-current in transistor devices.</div></div>","PeriodicalId":74483,"journal":{"name":"Power electronic devices and components","volume":"11 ","pages":"Article 100086"},"PeriodicalIF":0.0,"publicationDate":"2025-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143760219","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Finite element comparative study on creep and random vibrations of solder joints in BGA package BGA封装焊点蠕变与随机振动的有限元比较研究
Power electronic devices and components Pub Date : 2025-03-25 DOI: 10.1016/j.pedc.2025.100085
Joshua A. Depiver , Sabuj Mallik , Emeka H. Amalu
{"title":"Finite element comparative study on creep and random vibrations of solder joints in BGA package","authors":"Joshua A. Depiver ,&nbsp;Sabuj Mallik ,&nbsp;Emeka H. Amalu","doi":"10.1016/j.pedc.2025.100085","DOIUrl":"10.1016/j.pedc.2025.100085","url":null,"abstract":"<div><div>As the demand for increasing miniaturisation and functionality of electronic devices soars, understanding the creep and random vibration of solder joints (SJs) in BGA packages in devices is critical to achieving high device reliability. This research employs Finite Element Analysis (FEA) to evaluate the response of four lead-free and one eutectic (Sn63Pb37) solder joints in BGA packages to failure induced by creep and random vibration. Results show deformation and stress damage distributions on the solder joints. The bottom of the solder joint in the BGA assembly is critical to deformation and stress failure induced by thermal and vibration loadings—the stress magnitude of the lead-based solder joint and more than any of the lead-free joints. SAC305 demonstrates the accumulation of the largest volumetric strain energy density (SED) dissipation per cycle loading, while SAC405 accumulates the least SED. The solder joints of SAC387 and SAC405 are observed to amass the highest and least thermal strain, respectively. Stress magnitude in Sn63Pb37 solder joints is highest while that in SAC405 SJs is lowest. Furthermore, SAC405 and Eutectic Sn63Pb37 depict the largest and smallest deformation, respectively. A resilience response of SAC405 to thermal cycle loading is observed. However, the detected susceptibility to deformation-induced failure under random vibration challenges the solder's reliability performance. The findings provide new knowledge that guides the selection of solder alloys for BGA components in electronic devices operating across various sectors that demand higher reliability.</div></div>","PeriodicalId":74483,"journal":{"name":"Power electronic devices and components","volume":"11 ","pages":"Article 100085"},"PeriodicalIF":0.0,"publicationDate":"2025-03-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143760220","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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