2021 IEEE International Interconnect Technology Conference (IITC)最新文献_第5页

Selective deposition of AlOx for Fully Aligned Via in nano Cu interconnects 纳米铜互连中全排列通孔中AlOx的选择性沉积

2021 IEEE International Interconnect Technology Conference (IITC) Pub Date : 2021-07-06 DOI: 10.1109/IITC51362.2021.9537315

Son Van Nguyen, H. Shobha, C. Peethala, T. Haigh, H. Huang, J. Li, J. Demarest, B. Haran, D. Hausmann, P. Lemaire, K. Sharma, P. Ramani, A. Mahorowala

{"title":"Selective deposition of AlOx for Fully Aligned Via in nano Cu interconnects","authors":"Son Van Nguyen, H. Shobha, C. Peethala, T. Haigh, H. Huang, J. Li, J. Demarest, B. Haran, D. Hausmann, P. Lemaire, K. Sharma, P. Ramani, A. Mahorowala","doi":"10.1109/IITC51362.2021.9537315","DOIUrl":"https://doi.org/10.1109/IITC51362.2021.9537315","url":null,"abstract":"AlOx was selectively deposited on top of SiCOH in 32 nm pitch Cu-SiCOH pattern to form a Fully Aligned Via (FAV) test structure. Selective deposition process performance and its integration into the 5nm BEOL FAV structure were evaluated. The selective AlOx deposition involves multistep process including surface treatment, selective Self-Aligned Molecules (SAM) bonding to inhibit Cu metal surface, and the selective growth of AlOx on top of SiCOH dielectric using Chemical vapor deposition process with various precursors and process conditions below 300°C. Thin selective AlOx of 4–6 nm thickness show excellent selectivity on SiCOH over Co capped Cu-SiCOH patterned structures with various spacing. The Via Chain electrical yields were measured on 32 nm pitch structures by AlOx selective deposition and are comparable to the established FAV process by Cu wet recess. This indicates that the Selective AlOx deposition process is highly selective on SiCOH dielectric surface without defect formation in the Co Capped Cu surfaces.","PeriodicalId":6823,"journal":{"name":"2021 IEEE International Interconnect Technology Conference (IITC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2021-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82288725","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Virtual Metrology Equipped with a Variability Analyzer in Chemical Mechanical Polishing 基于变异性分析仪的化学机械抛光虚拟计量

2021 IEEE International Interconnect Technology Conference (IITC) Pub Date : 2021-07-06 DOI: 10.1109/IITC51362.2021.9537529

Lingyen Yeh, Shun Chun Huang

引用次数: 0

Multi-scale Modeling Approach to Assess and Mitigate Wafer Warpage in 3-D NAND Fabrication 三维NAND加工中晶圆翘曲的多尺度建模方法

2021 IEEE International Interconnect Technology Conference (IITC) Pub Date : 2021-07-06 DOI: 10.1109/IITC51362.2021.9537435

O. O. Okudur, Mario Gonzalez, G. Van den bosch, M. Rosmeulen

引用次数: 3

Materials Impact on SRAM Timing: An Ab Initio Study of Interconnects 材料对SRAM时序的影响:互连的从头算研究

2021 IEEE International Interconnect Technology Conference (IITC) Pub Date : 2021-07-06 DOI: 10.1109/IITC51362.2021.9537481

S. Aboud, T. Gunst, J. Cobb, Joanne Huang, P. Asenov, V. Arcisauskaite

引用次数: 0

Cu-Cu Bonding using Optimized Copper Nitride Passivation for 3D Packaging Applications 利用优化的氮化铜钝化技术实现3D封装应用中的Cu-Cu键合

2021 IEEE International Interconnect Technology Conference (IITC) Pub Date : 2021-07-06 DOI: 10.1109/IITC51362.2021.9537344

H. Park, Seungmin Park, Yoonho Kim, S. Kim

{"title":"Cu-Cu Bonding using Optimized Copper Nitride Passivation for 3D Packaging Applications","authors":"H. Park, Seungmin Park, Yoonho Kim, S. Kim","doi":"10.1109/IITC51362.2021.9537344","DOIUrl":"https://doi.org/10.1109/IITC51362.2021.9537344","url":null,"abstract":"3D packaging is able to keep the scaling in semiconductor market. Increased and shorter interconnects achieved by vertical stacking have benefits such as improved performance, reduced signal delay, and small form factor. In order to obtain high-quality 3D packaging applications, the integration of heterogeneous devices through bonding technologies is very important. Low temperature and pressure are essential during the bonding process because most of logic/memory devices has many metal and low-k dielectric layers, which are vulnerable to thermal budget and mechanical stress. Therefore, a small amount of solder with a low melting point is presently used on the top of the copper pillar for mass production. But, solder creates an intermetallic compound with copper at the bonding interface and cannot be applied to fine pitch patterns due to their reflow characteristics. Thus, Cu is emerged as a promising interconnect, but Cu-Cu bonding has few challenges because copper is easily oxidized and has a high melting point. In this paper, copper nitride, which prevents oxidation of the copper surface and promotes low temperature bonding, was studied by two step Ar/N2 plasma treatment. The optimum thickness of copper nitride passivation was derived using the design of experiment. It was also found that the copper nitride layer was almost decomposed at a temperature of 200°C.","PeriodicalId":6823,"journal":{"name":"2021 IEEE International Interconnect Technology Conference (IITC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2021-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"91398861","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Comparison of Copper and Cobalt Surface Reactivity for Advanced Interconnects 先进互连材料铜和钴表面反应性的比较

2021 IEEE International Interconnect Technology Conference (IITC) Pub Date : 2021-07-06 DOI: 10.1109/IITC51362.2021.9537458

Amine Lakhdari, M. Frégnaux, L. Caillard, A. Gonçalves, M. Thiam, F. Raynal, A. Etcheberry

{"title":"Comparison of Copper and Cobalt Surface Reactivity for Advanced Interconnects","authors":"Amine Lakhdari, M. Frégnaux, L. Caillard, A. Gonçalves, M. Thiam, F. Raynal, A. Etcheberry","doi":"10.1109/IITC51362.2021.9537458","DOIUrl":"https://doi.org/10.1109/IITC51362.2021.9537458","url":null,"abstract":"The constant shrinking of critical dimensions in logic manufacturing is driving a change in integration of interconnects. While copper has been the material of choice for the past few decades, it is currently facing a serious challenge from other materials like cobalt. The focus of this paper is three-fold. First, we compare the reactivity of both materials in different media. Next, we confirm that kinetics of native oxide formation when exposed to atmosphere is an order of magnitude slower for copper than for cobalt and that, in the case of cobalt, the presence of an oxide is not avoidable in the industry conditions. And finally, we investigated the compatibility of plating solutions manufactured by aveni for cobalt and copper deposition. Both solutions reveal that, not only do they etch the native oxide of a cobalt seed, but they also preserve the integrity of the underlying metallic cobalt layer. This is highlighted by the fact that no oxide is detected at the interface between the deposited metal and the seed after deposition. We therefore provide evidence of the compatibility of aveni plating solution with a wide array of integrations for next generation interconnects such as copper extension with direct-on-cobalt integration or full cobalt integration.","PeriodicalId":6823,"journal":{"name":"2021 IEEE International Interconnect Technology Conference (IITC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2021-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73625991","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

EM performance improvements for Cu interconnects with Ru-based liner and Co cap in advanced nodes : (Invited) 先进节点中采用ru基衬垫和Co帽的Cu互连的EM性能改进:(特邀)

2021 IEEE International Interconnect Technology Conference (IITC) Pub Date : 2021-07-06 DOI: 10.1109/IITC51362.2021.9537451

K. Motoyama

引用次数: 0

Design of an Integrated III–V on silicon semiconductor laser for spiking neural networks 用于脉冲神经网络的集成III-V型硅半导体激光器的设计

2021 IEEE International Interconnect Technology Conference (IITC) Pub Date : 2021-07-06 DOI: 10.1109/IITC51362.2021.9537482

Keshia Mekemeza Ona, B. Charbonnier, K. Hassan

引用次数: 2

Commercialization of MRAM – Historical and Future Perspective MRAM的商业化——历史与未来展望

2021 IEEE International Interconnect Technology Conference (IITC) Pub Date : 2021-07-06 DOI: 10.1109/IITC51362.2021.9537434

S. Ikegawa, F. Mancoff, S. Aggarwal

引用次数: 6

Exploring W-Cu hybrid dual damascene metallization for future nodes 探索未来节点的W-Cu杂化双大马士革金属化

2021 IEEE International Interconnect Technology Conference (IITC) Pub Date : 2021-07-06 DOI: 10.1109/IITC51362.2021.9537410

M. H. van der Veen, O. Pedreira, N. Heylen, N. Jourdan, S. Lariviere, S. Park, H. Struyf, Z. Tokei, W. Lei, S. Pethe, S. Hwang, F. Chen, Z. Wu, J. Machillot, A. Cockburn, A. Jansen

引用次数: 1