Journal of Computational Electronics最新文献

{"title":"Electrolyte-gated junctionless III-V Nanowire transistors: a TCAD-based evaluation","authors":"Muhammad Shaffatul Islam,&nbsp;Nithil Harris Manimaran,&nbsp;Alireza Abrand,&nbsp;John Wyatt Morrell,&nbsp;Ahmad R. Kirmani,&nbsp;Ke Xu,&nbsp;Parsian K. Mohseni","doi":"10.1007/s10825-025-02338-x","DOIUrl":"10.1007/s10825-025-02338-x","url":null,"abstract":"<div><p>In this study, we explore the operation and performance of electrolyte-gated junctionless III-V nanowire (NW) transistors featuring compositionally graded In_<i>x</i>Ga_1<i>-x</i>As channels. These devices leverage the electric double-layer (EDL) gating mechanism at the electrolyte/semiconductor interface to achieve ultra-high charge carrier densities, surpassing those possible with conventional oxide dielectrics. Fermi–Dirac statistics are introduced by a numerical method to reproduce associated charge densities of EDL transistors. A 1 nm interfacial HfO₂ layer is introduced to capture the electrostatics of the EDL, prevent charge transfer between the electrolyte and the semiconductor, and mimic the Stern layer. Device simulations are conducted to optimize the heterostructured NW composition and doping profile, followed by benchmarking against traditional HfO₂-gated structures. The EDL-gated device achieves an <i>I</i>_ON<i>/I</i>_OFF ratio of 10⁶, with a subthreshold slope of 60 mV/dec and a threshold voltage of 0.31 V at a low drain voltage of 0.3 V, indicating a two-order magnitude improvement over conventional junctionless oxide-gated NW transistors. Computational methodologies include finite element modeling in COMSOL to extract voltage-dependent ion densities and subsequent device simulations using Silvaco's Atlas software. The results indicate that the optimized EDL-gated device exhibits superior electrostatic integrity and performance metrics compared to conventional gating methods. The findings underscore the potential of EDL gating in III-V NW configurations for advanced electronic applications, demonstrating significant improvements in switching characteristics and power efficiency. Further optimization and exploration of bias-dependent ionic concentrations and configurable device geometries highlight the robustness and scalability of this approach for next-generation low-power electronics.</p></div>","PeriodicalId":620,"journal":{"name":"Journal of Computational Electronics","volume":"24 4","pages":""},"PeriodicalIF":2.5,"publicationDate":"2025-06-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://link.springer.com/content/pdf/10.1007/s10825-025-02338-x.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145142684","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Piezotronics-enabled performance enhancement in ZnONR/n-MoS2/i-MoS2/p-Si photovoltaics","authors":"K. Rathnakannan,&nbsp;R. Parasuraman","doi":"10.1007/s10825-025-02347-w","DOIUrl":"10.1007/s10825-025-02347-w","url":null,"abstract":"<div><p>This study explores the impact of the piezotronic effect on the performance of a ZnO nanorod/n-MoS₂/i-MoS₂/p-Si photovoltaic nano-heterostructure for achieving high-efficiency energy harvesting. We aimed to optimize the thickness of each layer in the piezo-photoelectric physical model to improve the J–V characteristics and energy band alignment. We found that a thickness of 5 nm for n-MoS₂ and 100 nm for ZnO NR, and the doping concentration led to the highest photoconversion efficiency of 28.08%. This configuration generated piezocharges at the ZnO/MoS₂ interfaces under applied strain ranging from − 1% to 1. This structure has potential for developing high-efficiency solar cells.</p></div>","PeriodicalId":620,"journal":{"name":"Journal of Computational Electronics","volume":"24 4","pages":""},"PeriodicalIF":2.5,"publicationDate":"2025-06-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145142657","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"High data rate 4x2 photonic crystal encoder using irregular hexagon ring resonator","authors":"Wafa Mehrez,&nbsp;Monia Najjar","doi":"10.1007/s10825-025-02345-y","DOIUrl":"10.1007/s10825-025-02345-y","url":null,"abstract":"<div><p>Ultra-fast and highly compact optoelectronic devices are highly needed for optical communication systems. One of the primary devices used in such systems is the optical encoder. In this paper, we present a 4×2 encoder realized using a new photonic crystal (PhC) ring resonator design. The proposed encoder consists of four inputs, two outputs, and two irregular hexagonal-shaped ring resonators. The structure is formed by silicon rods surrounded by air with square lattice photonic crystal structure. The photonic band gap and performance parameters are analyzed using plane wave expansion (PWE) and finite difference time (FDTD) methods. Our simulation results demonstrate that the normalized transmission values less than <span>(25%)</span> and more significant than <span>(50%)</span> are supposed to be logic states 0 and 1, respectively. The encoder’s maximum response time, contrast ratio, and footprint are 161fs, 13, 7dB, and <span>(204.8upmu )</span>m², respectively. Furthermore, the encoder can be used in optical systems with a bit rate of around 6.2Tbps, which is a very suitable device for high-speed networks.\u0000</p></div>","PeriodicalId":620,"journal":{"name":"Journal of Computational Electronics","volume":"24 4","pages":""},"PeriodicalIF":2.5,"publicationDate":"2025-06-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145142658","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"2D material-based plasmonic phototransistors under strong optical excitations","authors":"Raonaqul Islam,&nbsp;Ishraq Md. Anjum,&nbsp;Curtis R. Menyuk,&nbsp;Ergun Simsek","doi":"10.1007/s10825-025-02348-9","DOIUrl":"10.1007/s10825-025-02348-9","url":null,"abstract":"<div><p>Periodic arrays of metallic structures are commonly placed on top of two-dimensional (2D) materials to enhance the local electric field and light absorption, particularly for light detection and generation. However, such enhancement often leads to substantial increases in local temperature under high-power optical excitations. This study explores the feasibility of devising a novel phototransistor with moderate field enhancement yet superior thermal management. Our approach involves strategically placing metal nanoparticles beneath the 2D material and atop silicon pillars. Heat is efficiently transferred to the substrate, mitigating thermal accumulation by leveraging the high thermal conductivity of both metals and silicon. Through multi-physics numerical modeling, our analysis reveals that the proposed design has higher quantum efficiency under high-power excitations than plain and plasmonic phototransistors decorated with metal nanoparticles atop.</p></div>","PeriodicalId":620,"journal":{"name":"Journal of Computational Electronics","volume":"24 4","pages":""},"PeriodicalIF":2.5,"publicationDate":"2025-06-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://link.springer.com/content/pdf/10.1007/s10825-025-02348-9.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145142656","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Optimization of quantum capacitance and improvement of RF performance in dual-ribbon GNRFET by tuning the GNR-to-GNR distance","authors":"Amir Ghadiyani,&nbsp;Hossein Karimiyan Alidash","doi":"10.1007/s10825-025-02346-x","DOIUrl":"10.1007/s10825-025-02346-x","url":null,"abstract":"<div><p>We have optimized the RF parameters in dual-ribbon GNRFET transistors by reducing the GNR-to-GNR distance. We used the semi-empirical computational method of extended Hückel theory for calculations. The total capacitance arises from the combination of a parallel-plate electrostatic capacitance and quantum capacitance, wherein the second factor dominates in the overall calculation. To compute the quantum capacitance, we employed the density of states integral. Simulation results confirm the presence of non-uniform behavior in the <i>C</i>–<i>V</i> characteristic curve. Transmission conductance, intrinsic gate delay, power delay product, and <span>({f}_{text{T}}{L}_{text{g}})</span> product are evaluated in this study. The results indicate that the RF performance of the dual-ribbon device can be significantly improved by reducing the GNR-to-GNR distance. Decreasing the GNR-to-GNR distance by 2 nm (from 2.5 to 0.5 nm) improved the <span>({f}_{text{T}}{L}_{text{g}})</span> product by 510% for GNR (6,0) and increased it approximately 20-fold for GNR (7,0). That dimensional change reduced the intrinsic gate delay by 83.6% for GNR (6,0) and 90% for GNR (7,0). Additionally, a 13.6-fold reduction in PDP for GNR (6,0) and an 11-fold reduction in GNR (7,0) are other results of reducing GNR-to-GNR distance.</p></div>","PeriodicalId":620,"journal":{"name":"Journal of Computational Electronics","volume":"24 3","pages":""},"PeriodicalIF":2.5,"publicationDate":"2025-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145161734","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Boron nanotube growth by thermal evaporation","authors":"Zahra Atharipour,&nbsp;Mohammadreza Saeidi","doi":"10.1007/s10825-025-02343-0","DOIUrl":"10.1007/s10825-025-02343-0","url":null,"abstract":"<div><p>In this paper, a novel model based on the kinetic theory of gases and phonon vibrations of boron nanotube (BNTs) on a catalyst is presented to describe the growth mechanism of BNTs in thermal evaporation. The interaction between the BNTs and the cathalyst is investigated by Lennard–Jones potential. Simulations demonstrate that the BNTs length during growth is saturated due to damping factors and the BNTs inertia. In addition, the results show there is an optimum growth rate of temperature for the growth of the BNTs and this optimum rate can be derived from the theory. Furthermore, the relationship between the BNTs length and the type of catalyst demonstrates the existence of an optimum catalyst for optimizing the growth of BNTs at a specific growth rate of temperature. Finally, it is shown that increasing partial pressure leads to the longest BNTs due to the increasing probability of binding. All results agree with reported experimental results, so they can be useful in future experimental and theoretical research for the optimization of BNTs growth.</p></div>","PeriodicalId":620,"journal":{"name":"Journal of Computational Electronics","volume":"24 3","pages":""},"PeriodicalIF":2.5,"publicationDate":"2025-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145161179","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Low-voltage polarization switching in ferroelectric FinFET-based memory devices, using electric field nonlinearities","authors":"Shreyam Natani,&nbsp;P. R. Bandaru","doi":"10.1007/s10825-025-02341-2","DOIUrl":"10.1007/s10825-025-02341-2","url":null,"abstract":"<div><p>Characteristics inherent to nonplanar geometries, with an aim to reduce program/erase voltages in ferroelectric field-effect transistor (FE-FET)-based memory devices, are proposed. The basis is the enhancement of the electric field in the FE films integrated with Fin-based FE-FETs (FE-FinFET), compared to FE films in planar FE-FETs. A new design (DE/FE-FinFET), based on combining FE and dielectric (DE) materials in the gate stack of FinFETs, is also proposed. Modeling and technology computer-aided design simulations indicate larger memory window at lower voltages in Fin-based FE-FETs. It is found that with nonplanar geometries a memory window can be observed at voltages 11% lower with FE-FinFETs and 33% lower with DE/FE-FinFETs compared to planar configurations.</p></div>","PeriodicalId":620,"journal":{"name":"Journal of Computational Electronics","volume":"24 3","pages":""},"PeriodicalIF":2.5,"publicationDate":"2025-05-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145171640","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Triple-band perovskite based chiral metasurface biosensor with multi-functionalities","authors":"Vishakha Sharma,&nbsp;Yogita Kalra,&nbsp;Ravindra Kumar Sinha","doi":"10.1007/s10825-025-02332-3","DOIUrl":"10.1007/s10825-025-02332-3","url":null,"abstract":"<div><p>Driven by the need for unified design and miniaturization across bands, this work presents a novel approach to overcoming the single-functionality and limited applications of traditional metasurfaces. Here, a cutting-edge structural chiral metasurface is proposed exhibiting circular dichroism efficiently across three distinct spectral regions: the visible, near infrared, and mid infrared (MIR) bands each offering unique biosensing applications. The engineered metasurface is designed to achieve strong circular dichroism of 0.72, 0.56 and 0.71 in three different bands, providing tailored functionality as a biosensor for different biochemical and medical applications. Also, the designed structure has been tested as haemoglobin sensor for the detection of higher and lower concentration in the visible region, glucose sensor in near infrared region and as a cancer cell detection sensor in the MIR region offering the very high sensitivity.</p></div>","PeriodicalId":620,"journal":{"name":"Journal of Computational Electronics","volume":"24 3","pages":""},"PeriodicalIF":2.5,"publicationDate":"2025-05-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145171013","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Monte Carlo quantum simulation of a resonant tunneling heterostructure for thermionic cooling","authors":"Orazio Muscato,&nbsp;Vincenza Di Stefano","doi":"10.1007/s10825-025-02336-z","DOIUrl":"10.1007/s10825-025-02336-z","url":null,"abstract":"<div><p>We investigate the operation of a resonant tunneling diode acting as a refrigerator based on the thermionic effect. The electrothermal transport phenomena are tackled by solving the Wigner–Boltzmann transport equation coupled to the heat equation. The simulation results demonstrate that this device can reach relatively high cooling power. However, in the specific implementation analyzed, the maximum reduction in lattice temperature is significantly constrained by the thermal conductivity of the materials used. Finally, we discuss potential approaches to optimize the device’s performance.</p></div>","PeriodicalId":620,"journal":{"name":"Journal of Computational Electronics","volume":"24 3","pages":""},"PeriodicalIF":2.5,"publicationDate":"2025-05-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145171490","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Cryogenic sub-THz ultrathin-body InGaAs MOSFET: physical modeling and DC/RF analysis","authors":"S. Bhavesh Sai,&nbsp;M. Navaneeth,&nbsp;D. Kannadassan","doi":"10.1007/s10825-025-02324-3","DOIUrl":"10.1007/s10825-025-02324-3","url":null,"abstract":"<div><p>Cryogenic electronics demand high-performance, high-speed, and high-frequency transistors for various special applications which include space and quantum computers. With the present-day semiconductor processing technologies, it is possible to grow ultrathin III-V layers to fabricate MOSFETs and high-electron-mobility transistors (HEMTs). However, ultrathin-body (UTB) III-V MOSFETs are rarely studied at cryogenic temperatures. In this paper, we presented the detailed physical modeling for cryogenic temperatures to simulate realistic devices. The results are compared with measurement results. Scaled UTB InGaAs MOSFETs with gate lengths &lt;100 nm are simulated and analyzed for DC and high frequencies using TCAD tools. At low temperatures, the UTB InGaAs MOSFET exhibits a low subthreshold swing of <span>(&lt;60)</span> mV/dec and transconductance of <span>(&gt;2)</span> <span>(mS/mu m)</span>. The radio frequency (RF) analysis shows an operating or cutoff frequency <span>(f_{T}&gt;500)</span> GHz for a gate length <span>(L_{G}&lt;50)</span> nm. These results suggest the suitability of UTB III-V MOSFETs for future cryogenic sub-terahertz applications.</p></div>","PeriodicalId":620,"journal":{"name":"Journal of Computational Electronics","volume":"24 3","pages":""},"PeriodicalIF":2.5,"publicationDate":"2025-05-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145171491","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}