Aeu-International Journal of Electronics and Communications最新文献

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Generation of OAM beams with multiple modes with concentric spiral sub-array 同轴螺旋子阵列多模OAM波束的产生
IF 3.2 3区 计算机科学
Aeu-International Journal of Electronics and Communications Pub Date : 2026-03-01 Epub Date: 2026-01-27 DOI: 10.1016/j.aeue.2026.156236
Uğur Yeşilyurt, Elif Yaman
{"title":"Generation of OAM beams with multiple modes with concentric spiral sub-array","authors":"Uğur Yeşilyurt,&nbsp;Elif Yaman","doi":"10.1016/j.aeue.2026.156236","DOIUrl":"10.1016/j.aeue.2026.156236","url":null,"abstract":"<div><div>The vortex electromagnetic wave carrying orbital angular momentum (OAM) increases the spectral efficiency of communication systems. This is achieved by multiplexing the OAM waves in different modes in the same frequency channel due to their orthogonality. A concentric uniform circular array (CUCA) is generally used as a classical method for multiplexing OAM beams. However, CUCA employs a large number of phase-shifting units, which results in a complex feed network. In this paper, a concentric spiral array (CSA) is proposed, which eliminates the need for a complex feed network. CSA utilizes step height to obtain different OAM modes. To make the CSA configuration more compact to achieve high-mode OAM, a concentric spiral sub-array (CSSA) is used, which results in more uniform multiple OAM modes. Additionally, mode purity analyses of the CSA, CSSA, and rearranged CSSA configurations are carried out, and their mode purity performances are evaluated comparatively. Simulation results demonstrate that the proposed method both eliminates the need for external phase shifters and is effective in achieving high-purity OAM multiplexing at the equal divergence angle.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"207 ","pages":"Article 156236"},"PeriodicalIF":3.2,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146080143","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
An improved frequency compensation strategy for class AB headphone drivers 一种改进的AB类耳机驱动器频率补偿策略
IF 3.2 3区 计算机科学
Aeu-International Journal of Electronics and Communications Pub Date : 2026-03-01 Epub Date: 2026-01-16 DOI: 10.1016/j.aeue.2026.156217
Masoud Rostampour Koushkghazi , Hamed Aminzadeh , Abbas Kamali , Ali Emam Ghorashi
{"title":"An improved frequency compensation strategy for class AB headphone drivers","authors":"Masoud Rostampour Koushkghazi ,&nbsp;Hamed Aminzadeh ,&nbsp;Abbas Kamali ,&nbsp;Ali Emam Ghorashi","doi":"10.1016/j.aeue.2026.156217","DOIUrl":"10.1016/j.aeue.2026.156217","url":null,"abstract":"<div><div>This paper presents a low-power, highly-linear three-stage Class AB headphone capable of driving a wide load capacitor (<em>C</em><sub><em>L</em></sub>) range using an advanced frequency compensation network. A local AC feedback network replaces the classical transconductor-based quality factor control, enabling to reduce the silicon area and quiescent power by implementing the intermediate stage as a simple inverting common-source amplifier. Miller capacitance is split and each portion is coupled to an embedded current buffer, thereby moving non-dominant poles to higher frequencies without requiring new gain stages or bias-dependent elements. The proposed approach combines the wide-range load driving capability and high linearity under reduced power and area, making it suitable for high-fidelity headphone drivers. Post-layout simulation results of a prototype in a standard 65-nm CMOS process demonstrate a robust operation for the capacitive loads from 0 to 22 nF, achieving more than 114 dB DC gain and a minimum phase margin of 45°. It delivers 89.9 mW peak power into a 16 Ω load while consuming 0.52 mW power in 0.22 mm<sup>2</sup> silicon area. The THD + N of full-scale output is −104.6 dB at 20 KHz.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"207 ","pages":"Article 156217"},"PeriodicalIF":3.2,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147398930","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Design and optimization of a low-power dynamic MCML-based phase-frequency detector using Taguchi DoE and ANOVA for frequency synthesizers with fast-locking of 0.5 μs 基于田口DoE和方差分析的低功耗动态mcml相频检测器的设计与优化,频率合成器的快速锁定为0.5 μs
IF 3.2 3区 计算机科学
Aeu-International Journal of Electronics and Communications Pub Date : 2026-03-01 Epub Date: 2026-01-17 DOI: 10.1016/j.aeue.2026.156214
Dheeraj Singh Rajput , Bharat Choudhary , Archana Singhal , Dharmendar Boolchandani
{"title":"Design and optimization of a low-power dynamic MCML-based phase-frequency detector using Taguchi DoE and ANOVA for frequency synthesizers with fast-locking of 0.5 μs","authors":"Dheeraj Singh Rajput ,&nbsp;Bharat Choudhary ,&nbsp;Archana Singhal ,&nbsp;Dharmendar Boolchandani","doi":"10.1016/j.aeue.2026.156214","DOIUrl":"10.1016/j.aeue.2026.156214","url":null,"abstract":"<div><div>This paper introduces a novel Phase Frequency Detector (PFD) based on Dynamic MOS Current Mode Logic (DyCML), designed for low-power, high-speed frequency synthesizers. The proposed PFD eliminates the need for a reset path, thereby removing dead and blind zones and improving output linearity across a full phase range from –π to π. The DyCML approach offers inherent advantages such as low static power dissipation, high-speed switching, and enhanced noise immunity through differential, current-mode operation. Design parameters were optimized using Taguchi Design of Experiments (DoE) and Analysis of Variance (ANOVA) techniques to achieve optimal performance. The optimized PFD achieves a phase noise of –159.41 dBc/Hz, power consumption of 5.822 μW, maximum operating frequency of 6.91 GHz, and a delay of 42.76 ps. The layout area is 793.27 μm<sup>2</sup>, and the design attains a figure-of-merit of –168.55 dBc/Hz. Robustness is validated through Process-Voltage-Temperature and Monte Carlo analysis, showing close agreement between post-layout and pre-layout results. Integrated into a PLL frequency synthesizer, the PFD achieves a lock time of 500 ns at output frequency 3.8 GHz, with low jitter and minimal reference spur. The design is implemented in Cadence Virtuoso using a 0.18 μm SCL CMOS process at a 1.8 V supply.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"207 ","pages":"Article 156214"},"PeriodicalIF":3.2,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146025076","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A high-aperture-efficiency circularly polarized folded transmitarray with ultra-low profile and low design complexity 一种低轮廓、低设计复杂度、高孔径效率的圆极化折叠发射阵列
IF 3.2 3区 计算机科学
Aeu-International Journal of Electronics and Communications Pub Date : 2026-03-01 Epub Date: 2026-02-07 DOI: 10.1016/j.aeue.2026.156247
Xin-Zhi Bo , Bo-Wen Yuan , Zhen-Guo Liu , Meng-Zi Li , Ming Shen
{"title":"A high-aperture-efficiency circularly polarized folded transmitarray with ultra-low profile and low design complexity","authors":"Xin-Zhi Bo ,&nbsp;Bo-Wen Yuan ,&nbsp;Zhen-Guo Liu ,&nbsp;Meng-Zi Li ,&nbsp;Ming Shen","doi":"10.1016/j.aeue.2026.156247","DOIUrl":"10.1016/j.aeue.2026.156247","url":null,"abstract":"<div><div>An ultra-low-profile, low-complexity, circularly polarized folded transmitarray (CPFTA) with high aperture efficiency is proposed. The antenna comprises a bottom metal plate and a top multifunctional metasurface (MFM). A left-hand circularly polarized (LHCP) source is centered on the bottom plate. The top metasurface is constructed with subwavelength spiral microstrip lines in a receiver-transmitter (Rx-Tx) configuration. Anomalous reflection is achieved by tailoring the reflection phase distribution of the top-layer metasurface, thereby constraining the profile height to <em>H</em> = <em>F</em>/4. Ultimately, the antenna's <em>H</em>/<em>D</em> ratio is merely 0.144. Measurements confirm the simulated performance of the proposed FTA, with good agreement observed across the operating band. The measured peak gain values reach 25.5 dBic at 15.1 GHz, corresponding to an aperture efficiency of 43.5%. The proposed CP-FTA achieves an ultra-low profile and high aperture efficiency simultaneously, while maintaining low design complexity and enabling planar integration.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"208 ","pages":"Article 156247"},"PeriodicalIF":3.2,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146147242","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A high-efficiency CMOS rectifier with wide dynamic range based on dual dynamic gate-biasing and body self-biasing techniques 基于双动态栅极偏置和本体自偏置技术的高效宽动态范围CMOS整流器
IF 3.2 3区 计算机科学
Aeu-International Journal of Electronics and Communications Pub Date : 2026-03-01 Epub Date: 2026-01-28 DOI: 10.1016/j.aeue.2026.156225
Ang Li, Jian Liu, Chen Wang, Di Luo, Rui Wang, Kang Zeng
{"title":"A high-efficiency CMOS rectifier with wide dynamic range based on dual dynamic gate-biasing and body self-biasing techniques","authors":"Ang Li,&nbsp;Jian Liu,&nbsp;Chen Wang,&nbsp;Di Luo,&nbsp;Rui Wang,&nbsp;Kang Zeng","doi":"10.1016/j.aeue.2026.156225","DOIUrl":"10.1016/j.aeue.2026.156225","url":null,"abstract":"<div><div>This paper presents an efficient CMOS rectifier with a wide PDR for radio-frequency energy harvesting (RFEH) applications. The proposed circuit employs a dual dynamic gate-biasing technique to enhance the forward current at low input power levels while suppress the reversed leakage current at high input power levels. Thus, the rectifier’s PDR can be extended. In addition, a body self-biasing technique is developed to reduce the rectifying transistors’ threshold voltage during conduction, which further improves the sensitivity and expands the PDR. For validation, a 200 MHz CMOS rectifier is designed in a 40 nm CMOS process. The rectifier occupies a <span><math><mrow><mn>69</mn><mspace></mspace><mi>μ</mi><mi>m</mi></mrow></math></span> × <span><math><mrow><mn>93</mn><mspace></mspace><mi>μ</mi><mi>m</mi></mrow></math></span> chip area. The post-simulation results show that the proposed rectifier achieves a 87.5% peak PCE, a -19.4 dBm sensitivity and a 25.2 dB PDR (for PCE<span><math><mo>&gt;</mo></math></span>40%) with a 100 k<span><math><mi>Ω</mi></math></span> load.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"207 ","pages":"Article 156225"},"PeriodicalIF":3.2,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147398924","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A wideband endfire 9-port Vivaldi-based MIMO antenna for X-band standardized satellite applications 用于x波段标准化卫星应用的宽带端射9端口vivaldi MIMO天线
IF 3.2 3区 计算机科学
Aeu-International Journal of Electronics and Communications Pub Date : 2026-03-01 Epub Date: 2026-01-30 DOI: 10.1016/j.aeue.2026.156234
Rupam Bharati , Anvesh Pandey , Arun Kumar Saurabh , Manoj Kumar Meshram
{"title":"A wideband endfire 9-port Vivaldi-based MIMO antenna for X-band standardized satellite applications","authors":"Rupam Bharati ,&nbsp;Anvesh Pandey ,&nbsp;Arun Kumar Saurabh ,&nbsp;Manoj Kumar Meshram","doi":"10.1016/j.aeue.2026.156234","DOIUrl":"10.1016/j.aeue.2026.156234","url":null,"abstract":"<div><div>This paper presents a compact wideband 9-port MIMO antenna designed for X-band standardized satellite communication systems. The proposed configuration employs nine identical Vivaldi elements arranged in a uniform endfire orientation with a shared radiating aperture on a rectangular substrate occupying an electrical area of 1.59λ<sub>0</sub> × 5.3λ<sub>0</sub> (λ<sub>0</sub> calculated at 6.5 GHz). Each Vivaldi element comprises a tapered microstrip feed line, a microstrip-to-slit-line transition, an exponentially tapered radiating aperture, and an oval-shaped parasitic director. A tightly integrated layout is achieved by maintaining an edge-to-edge spacing of only 0.05λ<sub>0</sub> between adjacent elements. The antenna exhibits measured reflection coefficients (|S<sub><em>ii</em></sub>| <em>&lt;</em> −10 dB) and inter-element isolation (|S<sub><em>ij</em></sub>| ∈ <em>i</em> ≠ <em>j &lt;</em> −24 dB) over 6.5–12.2 GHz, fully encompassing the standardized X-band uplink (7.9–8.4 GHz) and downlink (7.25–7.75 GHz) frequency allocations. The radiation characteristics remain highly directive and stable across the operating band, yielding peak gain and peak total efficiency of 6.6 dBi and 77.1% for elements 5, respectively. Measured results show excellent agreement with simulations. Comprehensive evaluation of both conventional and diversity metrics confirms robust wideband MIMO performance, highlighting the antenna's suitability for high-gain directional links in satellite communication, remote sensing, and Satcom-on-the-Move (SOTM) platforms.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"207 ","pages":"Article 156234"},"PeriodicalIF":3.2,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147398931","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A compact memristor emulator for energy efficient neuron application 一个紧凑的忆阻器仿真器,用于节能神经元的应用
IF 3.2 3区 计算机科学
Aeu-International Journal of Electronics and Communications Pub Date : 2026-03-01 Epub Date: 2026-02-16 DOI: 10.1016/j.aeue.2026.156260
Arun Kalakola , Basit Shafat Makhdoomi , Rahul Ranjan , Rajeev Kumar Ranjan , Shahram Minaei
{"title":"A compact memristor emulator for energy efficient neuron application","authors":"Arun Kalakola ,&nbsp;Basit Shafat Makhdoomi ,&nbsp;Rahul Ranjan ,&nbsp;Rajeev Kumar Ranjan ,&nbsp;Shahram Minaei","doi":"10.1016/j.aeue.2026.156260","DOIUrl":"10.1016/j.aeue.2026.156260","url":null,"abstract":"<div><div>This article presents a memristor emulator circuit, the first to employ only a single MOSFET and a single capacitor, achieving high frequency operation up to 50 MHz. The MOSFET operates in saturation with its gate and drain shorted, functioning as a current source to charge the capacitor and emulate memristive behavior. The design achieves low transient power consumption of 33 <span><math><mi>μ</mi></math></span>W (NMOS) and 28 <span><math><mi>μ</mi></math></span>W (PMOS) using 180 nm SCL technology in Cadence Virtuoso. Extensive analyses including frequency, transient, non-volatility performance, and process variation studies were performed and validated through pre- and post-layout simulations. Experimental verification using off-the-shelf components confirmed its practicality. As a key application, a spiking neuron circuit utilizing the emulator demonstrated biologically inspired spiking behavior, featuring a compact layout (66.16 <span><math><mi>μ</mi></math></span>m <span><math><mo>×</mo></math></span> 95.11 <span><math><mi>μ</mi></math></span>m), energy per spike of 4.07 pJ, and power consumption of 7.31 <span><math><mi>μ</mi></math></span>W, underscoring its promise for low power neuromorphic computing.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"208 ","pages":"Article 156260"},"PeriodicalIF":3.2,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147404513","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Broadband and compact filtering power divider employing quarter circular/cambered SIW and CPW structures 宽带和紧凑型滤波功率分配器采用四分之一圆/弯曲SIW和CPW结构
IF 3.2 3区 计算机科学
Aeu-International Journal of Electronics and Communications Pub Date : 2026-03-01 Epub Date: 2026-01-09 DOI: 10.1016/j.aeue.2026.156196
Ke-Long Sheng, Xiang Wang, Song-Song Qian, Zhi-Yuan Zong, Huangyan Li, Boyu Sima, Wen Wu
{"title":"Broadband and compact filtering power divider employing quarter circular/cambered SIW and CPW structures","authors":"Ke-Long Sheng,&nbsp;Xiang Wang,&nbsp;Song-Song Qian,&nbsp;Zhi-Yuan Zong,&nbsp;Huangyan Li,&nbsp;Boyu Sima,&nbsp;Wen Wu","doi":"10.1016/j.aeue.2026.156196","DOIUrl":"10.1016/j.aeue.2026.156196","url":null,"abstract":"<div><div>This paper proposes a broadband and compact filtering power divider (FPD) based on quarter circular/cambered (QCC) substrate integrated waveguide (SIW) and coplanar waveguide (CPW) resonators. Firstly, the impact of the CPW slot length on the quality factor (<em>Q</em>) of the QCC SIW resonator is analyzed. Subsequently, the CPW resonator is integrated into the QCC SIW to form a third-order bandpass filter (BPF) with a cascaded trisection (CT) topology. A transmission zero is located in the upper stopband. Finally, two third-order hybrid QCC SIW and CPW filtering power dividers (FPDs) with and without isolation resistors are designed. Furthermore, this paper introduces a new method for rapidly determining the quantity and value of isolation resistors. All the designs presented in this paper are simulated, manufactured, and experimentally validated. The measured results indicate that the proposed third-order FPD with isolation resistors operates at a center frequency of 5.08 GHz with a 3-dB FBW of 41.3% (2.1 GHz). The insertion loss (IL) is approximately (3 + 1.1) dB. The isolation between two output ports is better than 16 dB. A transmission zero (TZ) can be observed at 6.75 GHz in the right side of the passband attributing to the cross-coupling scheme, which enhances the out-of-band selectivity. The overall size of the proposed FPD with isolation resistors is 1.71<em>λ</em><sub><em>g</em></sub> × 1.49<em>λ</em><sub><em>g</em></sub>, and it features advantages of broad operating bandwidth, compact physical size, and low insertion loss.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"207 ","pages":"Article 156196"},"PeriodicalIF":3.2,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146025077","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
CPW feed and stub optimization for Vivaldi antennas in broadband ground-penetrating radar applications 宽带探地雷达中维瓦尔第天线的CPW馈源和存根优化
IF 3.2 3区 计算机科学
Aeu-International Journal of Electronics and Communications Pub Date : 2026-03-01 Epub Date: 2026-01-15 DOI: 10.1016/j.aeue.2026.156219
Kurnia Paranita Kartika Riyanti , Eko Setijadi , Gamantyo Hendrantoro , Nurhayati
{"title":"CPW feed and stub optimization for Vivaldi antennas in broadband ground-penetrating radar applications","authors":"Kurnia Paranita Kartika Riyanti ,&nbsp;Eko Setijadi ,&nbsp;Gamantyo Hendrantoro ,&nbsp;Nurhayati","doi":"10.1016/j.aeue.2026.156219","DOIUrl":"10.1016/j.aeue.2026.156219","url":null,"abstract":"<div><div>Vivaldi antennas used in Ground Penetrating Radar (GPR) systems often experience performance degradation at low frequencies due to inefficient radiation and impedance mismatch between the feedline and the tapered slot structure. To address these limitations, this paper presents a compact Vivaldi antenna employing a coplanar waveguide (CPW) feedline integrated with a single-stub matching technique. The stub position is analytically optimized to improve impedance matching over a broad frequency range. The CPW configuration simplifies the antenna structure by placing both the feedline and ground plane on the same substrate layer, resulting in a compact layout and facilitating broadband operation. The proposed antenna is fabricated on an FR-4 substrate with a thickness of <span><math><mrow><mn>1</mn><mo>.</mo><mn>6</mn><mspace></mspace><mi>mm</mi></mrow></math></span> and a relative permittivity of <span><math><mrow><msub><mrow><mi>ϵ</mi></mrow><mrow><mi>r</mi></mrow></msub><mo>=</mo><mn>4</mn><mo>.</mo><mn>3</mn></mrow></math></span>, with overall dimensions of <span><math><mrow><mn>80</mn><mo>×</mo><mn>80</mn><mo>×</mo><mn>1</mn><mo>.</mo><mn>635</mn></mrow></math></span> <span><math><msup><mrow><mi>mm</mi></mrow><mrow><mn>3</mn></mrow></msup></math></span>. The measured results demonstrate broadband operation from 1.13 to 5 GHz. The antenna achieves a peak gain of 10.89 dBi in simulation and 10.36 dBi in measurement at 1.9 GHz, with a measured radiation efficiency of approximately 90.16% at the resonant frequency. The corresponding simulated and measured <span><math><msub><mrow><mi>S</mi></mrow><mrow><mn>11</mn></mrow></msub></math></span> values of <span><math><mrow><mo>−</mo><mn>61</mn><mo>.</mo><mn>21</mn></mrow></math></span> dB and <span><math><mrow><mo>−</mo><mn>39</mn><mo>.</mo><mn>13</mn></mrow></math></span> dB indicate effective impedance matching at resonance, with minor discrepancies attributed to fabrication tolerances and measurement conditions. To assess practical feasibility, a preliminary sandbox-based GPR experiment was conducted using a pair of identical antennas in a bistatic configuration. The resulting A-scan response shows a distinct reflection corresponding to a buried metallic target at an estimated depth of 37.7 cm, which agrees well with the actual burial depth. These results indicate that the proposed antenna can support broadband GPR sensing within the investigated frequency range, while further system-level and field validations are recommended.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"207 ","pages":"Article 156219"},"PeriodicalIF":3.2,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146080292","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Design and implementation of miniaturized DRA for five bands of GNSS GNSS五波段小型化DRA的设计与实现
IF 3.2 3区 计算机科学
Aeu-International Journal of Electronics and Communications Pub Date : 2026-03-01 Epub Date: 2026-01-30 DOI: 10.1016/j.aeue.2026.156240
Anup Kumar, Sushmita Bhushan, Rajveer Singh Yaduvanshi
{"title":"Design and implementation of miniaturized DRA for five bands of GNSS","authors":"Anup Kumar,&nbsp;Sushmita Bhushan,&nbsp;Rajveer Singh Yaduvanshi","doi":"10.1016/j.aeue.2026.156240","DOIUrl":"10.1016/j.aeue.2026.156240","url":null,"abstract":"<div><div>Novelty of the proposed design lies in miniaturization of Rectangular Dielectric Resonator Antenna (RDRA). Secondly, all Global Navigation Satellite System (GNSS) five bands have been accumulated in single structure. Amalgamation of metamaterial (MM) ring resonator, split ring resonators (SRR), modified rectangular slot and Artificial Magnetic Conductor (AMC) backplane structure has been used to design proposed GNSS antenna. The frequency resonances obtained are narrow (large frequency ratio) and highly sensitive, thus impedance is perfectly matched for all five bands. The simulated results are closely matched with the measured results. High front to back ratio (FBR) obtained using novel MM AMC backplane. Gain enhancement of 5dBi obtained in GNSS antenna using AMC backplane structure. DRA miniaturization (98.6%) has been carried out using MM. The antenna results have been measured at L1 (1575.42 MHz/L2(1227.6 MHz)/L3(1381.05 MHz)/L4(1379.913 MHz) and L5 (1176.45 MHz) bands.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"207 ","pages":"Article 156240"},"PeriodicalIF":3.2,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147398934","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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