Aeu-International Journal of Electronics and Communications最新文献

{"title":"Comparative reliability analysis of AF and DF relay-assisted wireless communications for Lomax and Fluctuating Nakagami-m fading channel models","authors":"Aleksey S. Gvozdarev,&nbsp;Tatiana K. Artemova,&nbsp;Mikhail A. Zuev","doi":"10.1016/j.aeue.2026.156244","DOIUrl":"10.1016/j.aeue.2026.156244","url":null,"abstract":"<div><div>This paper presents a rigorous comparative reliability analysis of Amplify-and-Forward (AF) and Decode-and-Forward (DF) relay-assisted wireless communication systems operating under severe fading and shadowing conditions. The study focuses on two advanced channel models capable of describing hyper-Rayleigh regimes: the Lomax fading model and the Fluctuating Nakagami-<span><math><mi>m</mi></math></span> model. For both assumed channel models, we derive novel closed-form expressions for the reliability loss metric, defined as the difference between outage probabilities of DF and AF relays in two-hop communication scenarios. The hyper-Rayleigh regimes for the adopted models are derived and their boundaries are comprehensively studied. Extensive numerical simulations reveal that the reliability gain achieved by replacing AF with DF relays is highly dependent on average SNR values, threshold SNR, and channel parameters. Results demonstrate that in low average SNR conditions with moderate fading, the DF relay provides substantial and parameter-independent reliability improvements, while in high SNR scenarios with severe fading, the advantage diminishes. The Lomax model exhibits greater sensitivity to parameter variations compared to the Fluctuating Nakagami-<span><math><mi>m</mi></math></span> model, making it more suitable for detailed reliability forecasting. These findings provide crucial insights for relay deployment strategies in 5G, Beyond 5G, and 6G networks operating in harsh propagation environments, including urban areas, industrial facilities, and vehicular communications.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"207 ","pages":"Article 156244"},"PeriodicalIF":3.2,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147398929","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Orthonormal splitting of RMS phase error in digitally controlled phase shifters","authors":"Francisco Aznar ,&nbsp;Uxua Esteban-Eraso ,&nbsp;Antonio D. Martínez-Pérez ,&nbsp;Roque Fernández ,&nbsp;Santiago Celma","doi":"10.1016/j.aeue.2026.156248","DOIUrl":"10.1016/j.aeue.2026.156248","url":null,"abstract":"<div><div>Traditionally, the RMS phase error has been the standard metric for assessing the quality of phase shifters used in phased-array beamforming antennas. However, this metric fails to isolate the different effects on the radiation pattern. This work proposes three novel metrics to provide a more nuanced analysis of digitally controlled phase shifters. These metrics, denoted as Beam Steering Error, Null Quality Error, and Side-Lobe Level Error, target specific performance characteristics of the radiation pattern. They are defined for any bit resolution, enabling the decomposition of the RMS phase error into three distinct components, each providing valuable insights into the performance of linear phased arrays. The limitations of conventional RMS phase error analysis are demonstrated, and the advantages of these new metrics are validated through a case study involving a 5-bit architecture implemented in a 65-nm CMOS process, as well as other phase shifters reported in the literature.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"208 ","pages":"Article 156248"},"PeriodicalIF":3.2,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147404514","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A survey on analog memristor emulators and their applications","authors":"Fayrouz Shaheen,&nbsp;Eman Azab,&nbsp;Amr Hassan","doi":"10.1016/j.aeue.2026.156223","DOIUrl":"10.1016/j.aeue.2026.156223","url":null,"abstract":"<div><div>This paper provides a comprehensive review of analog memristor emulators (Memulators), starting with the theoretical foundation of memristors, historical development, and their physical structures. It then investigates their design methodologies and operational principles in various circuit topologies, encompassing both MOS-based and Active Building Block (ABB)-based designs, which are critically examined, highlighting their unique characteristics, performance trade-offs (including power consumption, layout area, and maximum operating frequency), and inherent design considerations. Addressing the lack of standardisation in the field, a concrete, minimal benchmark suite is proposed, specifying test signals and robustness tests to ensure reproducible characterisation. A detailed comparative analysis of recent analog memulator circuits is presented, employing a defined Figure of Merit (FoM) and introducing a novel framework of qualitative comparison tables. Unlike traditional performance listings, this framework meticulously evaluates designs based on validation rigour (distinguishing simulation from experimental silicon), architectural versatility, and electronic tunability, providing a systematic metric for practical deployment readiness. Furthermore, a critical analysis of implementation challenges — including sneak paths, device variability, and forming-free operation — synthesises how different topologies mitigate these issues. Key case studies of fabricated memulator designs are also highlighted, illustrating practical realisation and system-level application. The paper further explores a wide range of applications, with particular emphasis on neuromorphic computing and chaotic oscillators for secure communications, demonstrating their practical significance in modern electronics. Finally, recent advancements and innovations from the literature are summarised, alongside a thorough discussion of prevailing research trends and promising future research directions aimed at overcoming existing limitations and unlocking new capabilities.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"207 ","pages":"Article 156223"},"PeriodicalIF":3.2,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146080145","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Soft-constrained reinforcement learning for antenna optimization with feasibility prescreening","authors":"Bingjie Zhang ,&nbsp;Qiao Chen ,&nbsp;Yifan Yin ,&nbsp;Hongxin Zhao ,&nbsp;Qipeng Wang ,&nbsp;Peng Liu ,&nbsp;Xiaoxing Yin ,&nbsp;Shunli Li","doi":"10.1016/j.aeue.2026.156235","DOIUrl":"10.1016/j.aeue.2026.156235","url":null,"abstract":"<div><div>This work proposes a soft-constrained reinforcement learning (SC-RL) framework integrating feasibility prescreening and trust region mechanisms to address physical constraints in high-dimensional parameter space. By embedding penalty rules into the reward function, the framework transforms physical constraints into learnable optimization signals while leveraging proximal policy optimization (PPO) to stabilize policy updates. By establishing a unified abstraction where constraints are defined as mathematical penalty signals, the framework exhibits generalizability across varying antenna structures and radiation mechanisms. Experimental validation on a broadband antipodal linearly tapered slot antenna (ALTSA) and a wideband filtering patch antenna (FPA) demonstrates superior optimization performance and a favorable convergence rate compared to baseline methods. The ALTSA optimized by the proposed framework achieves a 21.1% impedance bandwidth, 6.90% axial ratio bandwidth, and 9.17 dBic peak gain, exceeding the original targets of 16%, 5%, and 8.8 dBic, respectively. While the optimized FPA attains a 23.1% impedance bandwidth and 9.96 dBi peak gain, surpassing its goals of 17% and 9.7 dBi. Furthermore, the convergence speed of this framework is 21.7% and 31.1% faster than standard PPO in the two cases, while outperforming traditional algorithms which are prone to either premature convergence or slower stabilization.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"207 ","pages":"Article 156235"},"PeriodicalIF":3.2,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146080141","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Multi-task neural metamodel and NSGA-II for ultra-low-power OTA design in tunable vowel filters","authors":"Savvas Karipidis ,&nbsp;Julia Nako ,&nbsp;Andi Buzo ,&nbsp;Georg Pelz ,&nbsp;Costas Psychalinos ,&nbsp;Thomas Noulis","doi":"10.1016/j.aeue.2026.156241","DOIUrl":"10.1016/j.aeue.2026.156241","url":null,"abstract":"<div><div>This work presents a complete deep-learning-driven automation flow for designing ultra-low-power subthreshold operational transconductance amplifiers used in electronically tunable gm-C resonator and anti-resonator circuits for speech vowel processing. A multi-task learning neural network is trained as an accurate and extremely fast metamodel (surrogate) of an 8-parameter operational transconductance amplifier topology in 350 nm CMOS process node. Using only 60000 Latin-hypercube-sampled circuit simulations for training, the metamodel predicts DC power consumption, total transistor area, and DC transconductance with average errors of 2.9%, 5.0%, and 7.3%, respectively. The trained model is then coupled with the NSGA-II multi-objective genetic algorithm to instantly generate Pareto-optimal trade-offs between power and area for any designer-specified gm value in the 45–55 nA/V range typical of vowel formant filters. Compared to conventional simulation-in-the-loop NSGA-II optimization, the proposed flow reduces the total design time from 25 h to 7 h, a 3.5 times speedup, and against the standard human design methodology, the acceleration is higher than 20 times. The methodology enables on-the-fly power/area optimization of all operational transconductance amplifiers in sixth-order tunable vowel filters without need for re-design.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"207 ","pages":"Article 156241"},"PeriodicalIF":3.2,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147398921","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Elliptical shape microstrip antennas loaded with plus shape slot for compact and wideband circular polarized response","authors":"Amit A. Deshmukh ,&nbsp;Devika Panicker ,&nbsp;Aarya Gaonkar ,&nbsp;Venkata A.P. Chavali","doi":"10.1016/j.aeue.2026.156239","DOIUrl":"10.1016/j.aeue.2026.156239","url":null,"abstract":"<div><div>Compact design of Elliptical shape microstrip antenna embedded with plus shape slot is presented for circular polarized response. Attributed to the reduction in orthogonal mode frequencies, slot cut elliptical patch yields circular polarized response in a lower frequency band. It yields axial ratio and reflection coefficient bandwidth of 92 MHz (6.27%) and 1002 MHz (60.1%), respectively, with 128 MHz (8.04%) reduction in the center frequency of axial ratio bandwidth. Similar design employing plus shape slot on the ground plane is proposed. This design yields axial ratio and reflection coefficient bandwidth of 46 MHz (3.27%) and 720 MHz (49.04%), respectively, and offers reduction in the center frequency of axial ratio bandwidth by 189 MHz (11.87%). Thus, slot on the ground plane achieves more frequency reduction and thus a more compact solution. Next, slot cut technique is extended to the wideband gap-coupled configuration. Multi-resonator plus shape slot cut elliptical patch design yields axial ratio bandwidth of 243 MHz (27.01%), and offers 86 MHz (8.73%) reduction in the center frequency of axial ratio bandwidth, thereby providing a compact wideband design. Resonant length formulation for the ground plane slot cut antenna and subsequent design methodology to realize reconfigurable compact dual band stub loaded elliptical patch design that addresses to GPS L3 and L2, L5 bands, is presented. Thus, proposed work not just presents a slot cut circular polarized configuration, but puts forward a technique that achieves reduction in the center frequency of axial ratio bandwidth and an equivalent patch area reduction.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"207 ","pages":"Article 156239"},"PeriodicalIF":3.2,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147398923","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Corrigendum to “Design of SFMSIW MIMO antenna with low mutual coupling using notch filter” [AEU - Int. J. Electron. Commun. 201 (2025) 155968]","authors":"Mansour H. Almalki ,&nbsp;Mohammad Awedh ,&nbsp;Mohammed N. Ajour ,&nbsp;Avez Syed","doi":"10.1016/j.aeue.2026.156245","DOIUrl":"10.1016/j.aeue.2026.156245","url":null,"abstract":"","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"207 ","pages":"Article 156245"},"PeriodicalIF":3.2,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147398932","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A fully-integrated GaAs MMIC ultra-broadband distributed efficient power amplifier chip with 107% fractional bandwidth","authors":"Zhuoyin Chen,&nbsp;Yongle Wu,&nbsp;Xiaopan Chen,&nbsp;Wei Zhao,&nbsp;Shuchen Zhen,&nbsp;Weimin Wang","doi":"10.1016/j.aeue.2026.156249","DOIUrl":"10.1016/j.aeue.2026.156249","url":null,"abstract":"<div><div>This paper proposes a novel compact ultra-broadband distributed efficient power amplifier (BDEPA) structure in a GaAs pHEMT process. Conventional distributed efficient power amplifiers (DEPAs) are often limited in bandwidth by their input power splitting and phase-shifting networks. To overcome this limitation, the proposed architecture introduces an (N+1) section fully-distributed input matching network (FDIMN), which replaces the conventional input network to significantly extend the operational bandwidth while maintaining high power back-off (PBO) efficiency. To validate the proposed concept, a monolithic microwave integrated circuit (MMIC) was fabricated and measured. The measurement results demonstrate a state-of-the-art fractional bandwidth of 107% from 3.5 to 11.5 GHz. Across this band, the BDEPA delivers a saturated output power of 21.5–24.0 dBm with a corresponding drain efficiency (DE) of 28.3–39.1%. At a 6-dB PBO, the DE remains high at 23.1–33.9%. Under a 100-MHz 64-QAM modulated signal, the PA achieves an average output power of 16.5/15.5 dBm and −32.3/-31.4 dBc ACLR at 5/10 GHz in −25 dB EVM level. The entire chip occupies a compact area of 3.2 mm<span><math><msup><mrow></mrow><mrow><mn>2</mn></mrow></msup></math></span>.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"208 ","pages":"Article 156249"},"PeriodicalIF":3.2,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146147573","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Design of wideband resistive continuous class-J Doherty power amplifier with harmonic load modulation suppression","authors":"Wa Kong,&nbsp;Wenya Liu,&nbsp;Hongyan Fu,&nbsp;Hui Ma,&nbsp;Wence Zhang,&nbsp;Jing Xia","doi":"10.1016/j.aeue.2026.156226","DOIUrl":"10.1016/j.aeue.2026.156226","url":null,"abstract":"<div><div>This paper proposes a design method of a wideband Doherty power amplifier (DPA) using resistive continuous class-J mode with harmonic load modulation suppression, aiming to achieve high efficiency at back-off output powers (BOPs) across a wide frequency band. Firstly, based on theoretical impedance analysis of the resistive continuous class-J mode, the optimum load impedances under both saturation and BOP conditions are identified for DPA design. Then, combined with the load modulation theory, optimization objective functions are formulated for the peaking output matching networks (OMNs) design and optimization. In addition, to control the carrier second harmonic impedance during the load modulation, the peaking OMN using fragment-type matching circuit is used to suppress harmonic load modulation. For verification, a DPA operating at 2.0–3.4 GHz is designed and measured. The results show that the DPA achieves saturated output power of 43.1–44.4 dBm across the entire frequency band, with drain efficiencies of 59.1%–72% at saturation and 50%–58.9% at 6 dB BOP.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"207 ","pages":"Article 156226"},"PeriodicalIF":3.2,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146025078","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Generation of OAM beams with multiple modes with concentric spiral sub-array","authors":"Uğur Yeşilyurt,&nbsp;Elif Yaman","doi":"10.1016/j.aeue.2026.156236","DOIUrl":"10.1016/j.aeue.2026.156236","url":null,"abstract":"<div><div>The vortex electromagnetic wave carrying orbital angular momentum (OAM) increases the spectral efficiency of communication systems. This is achieved by multiplexing the OAM waves in different modes in the same frequency channel due to their orthogonality. A concentric uniform circular array (CUCA) is generally used as a classical method for multiplexing OAM beams. However, CUCA employs a large number of phase-shifting units, which results in a complex feed network. In this paper, a concentric spiral array (CSA) is proposed, which eliminates the need for a complex feed network. CSA utilizes step height to obtain different OAM modes. To make the CSA configuration more compact to achieve high-mode OAM, a concentric spiral sub-array (CSSA) is used, which results in more uniform multiple OAM modes. Additionally, mode purity analyses of the CSA, CSSA, and rearranged CSSA configurations are carried out, and their mode purity performances are evaluated comparatively. Simulation results demonstrate that the proposed method both eliminates the need for external phase shifters and is effective in achieving high-purity OAM multiplexing at the equal divergence angle.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"207 ","pages":"Article 156236"},"PeriodicalIF":3.2,"publicationDate":"2026-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146080143","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}