IMAPS symposia and conferences最新文献

{"title":"In Situ Reduction-Sintering to Produce Copper Interconnects for High Temperature Electronics","authors":"Yang Zuo, Samjid H. Mannan","doi":"10.4071/001c.90012","DOIUrl":"https://doi.org/10.4071/001c.90012","url":null,"abstract":"This study presents a special in situ reduction-sintering of CuO and Cu nanoparticles. The microstructure and strength of sintered Cu joints by CuO and Cu nanoparticle were compared. The reduced Cu particles of CuO have a larger size of 1 μm and lower sinterability which results in an insufficient sintering of Cu. In contrast, the sintered Cu nanoparticle structure shows a strong bonding of Cu and plastic deformation after fracture. Owing to the removal of the original oxide and limitation of its re-appearing during sintering by the proposed method, high sintered Cu joint strength over 30 MPa was achieved without the need for pressurized sintering or protective gas atmospheres.","PeriodicalId":500457,"journal":{"name":"IMAPS symposia and conferences","volume":"117 44","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-11-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135136914","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"GREEN CHEMISTRY FOR PROTECTION OF HIGH TEMPERATURE (> 250°C) ELECTRONICS","authors":"Jochen Schuermans","doi":"10.4071/001c.90013","DOIUrl":"https://doi.org/10.4071/001c.90013","url":null,"abstract":"A new modified “green” thermoset resin was developed and evaluated as an alternative encapsulation packaging material in comparison to traditional higher temperature resistant resins such as epoxies, silicones, cyanate esters and polyimide resins. Where epoxies and silicones have shown to provide good reliability for applications up to 150 – 200°C, high temperature applications, often required other chemistries, such as cyanate ester or polyimides. However, cyanate ester and/or polyimide based resins have recently been affected by new European environmental legislation making their usability, and especially environmental and health acceptance, not viable for the medium and long term. In combination to these environmental concerns, the current significant growth of the market for high power and high temperature electronics, also in more “consumer-type” applications, imply the need for “green” chemistry, capable to respond to high temperature (> 250°C) requirements. This paper will describe new materials, based on hybrid chemistry, in line with current European chemical (SVHC-compliant) regulations, responding to the current and future harsh environment requirements. DSC analysis was done to demonstrate the newly developed green chemistry provides Tg values well over 250°C. The combination of a hybrid chemistry with optimized adhesion properties, high Tg and low coefficient of thermal expansion seem to provide mechanical features which can address the problem of mechanical fatigue of traditional epoxy solutions, which did historically not provide the solutions which often, non-environmental friendly solutions, based on poly-imides or cyanate esters could offer.","PeriodicalId":500457,"journal":{"name":"IMAPS symposia and conferences","volume":"118 6","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-11-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135136905","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"AlGaN High Electron Mobility Transistor for High Temperature Logic","authors":"B.A. Klein, A.A. Allerman, A.G. Baca, C.D Nordquist, A.M. Armstrong, M. Van Heukelom, A. Rice, V. Patel, M. Rosprim, L. Caravello, R. DeBerry, J.R. Pipkin, V.M. Abate, R.J. Kaplar","doi":"10.4071/001c.89940","DOIUrl":"https://doi.org/10.4071/001c.89940","url":null,"abstract":"We report on AlGaN HEMT-based logic development, using combined enhancement- and depletion-mode transistors to fabricate inverters with operation from room temperature up to 500°C. Our development approach included: (a) characterizing temperature dependent carrier transport for different AlGaN HEMT heterostructures, (b) developing a suitable gate metal scheme for use in high temperatures, and (c) over-temperature testing of discrete devices and inverters. Hall mobility data revealed the GaN-channel HEMT experienced a 6.9× reduction in mobility, whereas the AlGaN channel HEMTs experienced about a 3.1x reduction. Furthermore, a greater aluminum contrast between the barrier and channel enabled higher carrier densities in the two-dimensional electron gas for all temperatures. The combination of reduced variation in mobility with temperature and high sheet carrier concentration showed that an Al-rich AlGaN-channel HEMT with a high barrier-to-channel aluminum contrast is the best option for an extreme temperature HEMT design. Three gate metal stacks were selected for low resistivity, high melting point, low thermal expansion coefficient, and high expected barrier height. The impact of thermal cycling was examined through electrical characterization of samples measured before and after rapid thermal anneal. The 200 nm tungsten gate metallization was the top performer with minimal reduction in drain current, a slightly positive threshold voltage shift, and about an order of magnitude advantage over the other gates in on-to-off current ratio. After incorporating the tungsten gate metal stack in device fabrication, characterization of transistors and inverters from room temperature up to 500°C was performed. The enhancement-mode (e-mode) devices’ resistance started increasing at about 200°C, resulting in drain current degradation. This phenomenon was not observed in depletion-mode (d-mode) devices but highlights a challenge for inverters in an e-mode driver and d-mode load configuration.","PeriodicalId":500457,"journal":{"name":"IMAPS symposia and conferences","volume":"70 S1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135544557","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Extended Lifetime Testing of SiC CMOS Electronics at 500°C","authors":"Emad Andarawis, Cheng-Po (Paul) Chen, Jeremy Popp, Liang Yin, David Shaddock","doi":"10.4071/001c.89941","DOIUrl":"https://doi.org/10.4071/001c.89941","url":null,"abstract":"Silicon Carbide (SiC) CMOS electronics is a promising approach for realizing high level of integration, especially for implementing digital functions, while significantly reducing the power dissipation on chip compared to NMOS-only, or JFET approaches. Gate oxide in MOSFET-based electronics pose a potential reliability challenge for operating at extreme temperatures. GE has previously developed gate oxide reliability models that predicted reliable operation at 500°C, but experimental validation had not been conducted previously. Recent testing results of testing of 500°C operation of SiC CMOS based integrated circuit over 60 days of continuous operation are presented. The results show the gate oxide surviving extended operating time of both NMOS and PMOS devices at 500°C. and thereby enabling a roadmap towards realizing more complex digital function at extreme temperature >=500°C.","PeriodicalId":500457,"journal":{"name":"IMAPS symposia and conferences","volume":"70 S3","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135544802","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"High temperature operation of Beta-Ga2O3 transistors","authors":"Ahmad E. Islam, Nicholas P. Sepelak, Kyle J. Liddy, Rachel Kahler, Jeremiah Williams, Daniel M. Dryden, Andrew J. Green, Kelson D. Chabak","doi":"10.4071/001c.89942","DOIUrl":"https://doi.org/10.4071/001c.89942","url":null,"abstract":"We studied the application of Beta-Ga2O3 for high temperature operation up to 500C. Field effect transistors were fabricated using epitaxial films grown on insulating Beta-Ga2O3 substrates. Variable temperature DC measurements were performed in vacuum and air ambient. Measurements revealed a reduction in on/off ratio for the devices due to increase in thermionic emission over the gate/dielectric barrier of MOSFET and over the gate/semiconductor barrier of MESFET. Devices also exhibited detrapping of electrons from interface traps with the increase in temperature. After the devices were tested intermittently at different high temperatures in vacuum or in air ambient, suggesting no change in semiconductor and contact properties.","PeriodicalId":500457,"journal":{"name":"IMAPS symposia and conferences","volume":"75 S7","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135545500","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Pt/HTCC Alumina based Electronic Packaging System and Integration Processes for High Temperature Harsh Environment Applications","authors":"Liang-Yu Chen, Philip G. Neudeck, David J. Spry, Gary W. Hunter","doi":"10.4071/001c.89946","DOIUrl":"https://doi.org/10.4071/001c.89946","url":null,"abstract":"Electronic devices capable of operation at 500°C are required for long term Venus surface missions, as well as for in situ monitoring and control of next generation aeronautical engines. High temperature sensors and electronics can also find many applications in military, and energy and automobile industries. Various silicon carbide (SiC) sensors and electronic devices have been developed for operation at 500 °C, and a compatible packaging system is needed for long term test and deployment of these high temperature devices. High temperature co-fired ceramics (HTCC) alumina with platinum (Pt) conductor was proposed for high temperature electronic packaging. A prototype Pt/HTCC alumina packaging system including chip-level package and circuit board has been briefly reported previously for long-term electrical testing of SiC integrated circuits at 500 °C, and brief testing at much higher temperatures. HTCC alumina is an excellent dielectric material with acceptable dielectric constant and low dielectric loss over wide temperature and frequency ranges. Pt is chemically noble and can be co-fired with HTCC alumina in air ambient producing a viable electronic packaging material system for high temperature applications. This paper presents a more detailed description of this packaging system including prototype low power packages and circuit boards based on HTCC alumina and Pt metallization for 500°C and other harsh environment applications. The key technical considerations for chip-level packaging and circuit board assembly, including materials and processes for 500 °C durable wire-bonding and SiC die attach, and integration of multi-chip circuit boards, are presented. Experimental test results of this packaging approach applied to SiC integrated circuits at 500 °C and 700°C are discussed as well.","PeriodicalId":500457,"journal":{"name":"IMAPS symposia and conferences","volume":"75 11","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135545496","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Bonding with brazing alloys as high-temperature interconnection filler through self-propagating exothermic reaction","authors":"Canyu Liu, Zhaoxia Zhou, Changqing Liu","doi":"10.4071/001c.89937","DOIUrl":"https://doi.org/10.4071/001c.89937","url":null,"abstract":"There has been growing interest in wide bandgap (WBG) semiconductors including SiC and GaN due to the increasing demands for electronic devices serving at high temperatures. However, to maximise the potential capacity of WBG devices, new high-temperature interconnection materials and processes are indispensable as the current existing Sn-based solder alloys and bonding processes developed for Si devices are unable to meet the reliability requirements. In the present work, reactive brazing alloys including Cu-15Ag-5P and Incusil (Ag-27.25Cu-12.5In-1.25Ti) with melting points above 600°C have been utilized as the interconnection materials which offer excellent properties under high operation temperature. The self-propagating exothermic reaction (SPER) was applied for the bonding process via an intense rapid local heating and cooling at a millisecond scale. The strong Cu/Cu-15Ag-5P/Cu and Cu/Incusil/Cu sandwich bonded structures have been created with the assistance of SPER, where the nanofoil was applied from the outside of stacked structures as an external heat source and the bonding process was conducted in the ambient atmosphere without using flux. It has been found that the P element in Cu-15Ag-P alloy has the self-flux effect, which is beneficial for the ultra-fast interfacial reaction process. The experiments where the nanofoil was placed inside of stacked structures between two sheets of brazing alloys have also been conducted, which exhibited the well-bonded interface microstructures between nanofoil and brazing alloys. The outlook on the design for practicality and industrial uses for SPER-assisted bonding with brazing alloys has also been discussed, as a potential viable assembly route for the high-temperature and high-power electronics packaging.","PeriodicalId":500457,"journal":{"name":"IMAPS symposia and conferences","volume":"70 5","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135544801","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Designs of ultra-HPHT Electrical Component Packages for Downhole and Geothermal Wellbore Logging Tool Integrations","authors":"Hua Xia, David DeWire","doi":"10.4071/001c.89962","DOIUrl":"https://doi.org/10.4071/001c.89962","url":null,"abstract":"Conventional dielectric sealing materials (PEEK, glass and glass-ceramic) used for sealing electrical feedthroughs, connectors, interconnectors and bulkheads in electronic packages can provide reliable downhole wellbore long-term logging tool service up to 150C or short-term logging service for greater than/equal 200C, due primarily to low glass transition temperature of the used sealing materials. This paper will demonstrate that the maximum allowable operating pressure and temperature could be from 20KSI to 100KSI and from 200C to 400C with Borosilicate and Bismuth-Boron-Silica (XTS) sealing glasses. Borosilicate glass sealed Inconel-Kovar/Kovar electronic housing could maintain reliability up to the maximum pressures of ~35KSI at 200C or 25KSI at 400C. Similarly, a Bismuth-Boron-Silica XTS glass sealed stainless steel electronic package housing could have a maximum operating pressure of ~100KSI at 150C or ~50KSI at 300C temperature. It has been found that high glass transition temperatures of (440-560)C for Borosilicate glass and (44010)C for Bismuth-Boron-Silicate (XTS) glass are key for making highly reliable ultra-HPHT electronic component packages. It is shown that the tetrahedral diamond-like microstructures of these sealing glasses are keys to ensure water-repelling properties to maintain sufficient electrical insulation resistance regardless of their use in water or moisture-rich wellbores. Moreover, compressive pin stress is found to be additional key for mitigate frequently observed glass seal cracks during logging tool field services.","PeriodicalId":500457,"journal":{"name":"IMAPS symposia and conferences","volume":"69 11","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135544560","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"AlScN-on-SiC Diaphragm Multimode Micromechanical Resonators for High-Temperature Sensing Applications","authors":"Wen Sui, Haoran Wang, Jaesung Lee, Afzaal Qamar, Mina Rais-Zadeh, Philip X.-L. Feng","doi":"10.4071/001c.89964","DOIUrl":"https://doi.org/10.4071/001c.89964","url":null,"abstract":"We demonstrate circular diaphragm multimode micromechanical resonators made of heterostructure thin film of aluminum scandium nitride (AlScN) sputtered on cubic silicon carbide (3C-SiC). We systematically characterize the multimode resonators from room temperature up to 600ºC high-temperature environment. We observe clear consistency in resonances measured in heating up and cooling down processes, validating that the AlScN/SiC diaphragm resonators can operate robustly in high-temperature environment up to 600°C without observable degradation. Raman spectroscopy results indicate that the turning points of the peak positions of the longitudinal optical (LO) phonon modes of both 3C-SiC and AlScN occur in almost the same temperature region where the turning point of temperature coefficient of resonance frequency (TCf) is observed. We calibrate the device temperature by measuring Raman peak of the silicon (Si) substrate of the chip, yielding a crystal lattice temperature of 410ºC at the heater setting temperature being 600ºC. The heating efficiency can be improved by clamping the chip using a clip or jig with lower thermal conductivity.","PeriodicalId":500457,"journal":{"name":"IMAPS symposia and conferences","volume":"70 4","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135544803","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Investigation of Key Parameters for Syringe-printing of Nano-silver Paste","authors":"He Yun, Patrick McCluskey","doi":"10.4071/001c.89959","DOIUrl":"https://doi.org/10.4071/001c.89959","url":null,"abstract":"Additive manufacturing (AM) techniques, also known as 3D printing, have been embedded into electronic components used for power modules as they can meet complex design requirements with less material waste and shorter lead-time. However, the corresponding manufactural considerations need to be investigated to ensure good printing quality. This paper is a parametric study of previous research [1], specifically focusing on the key parameters for the syringe-printing method that has been used to print a single-layer planar transformer winding implemented on a 10kW DC-DC power converter. A series of key parameters such as kick, trim length, feed rate, and pass spacing are defined, followed by inquiring into the printable regarding the width of a single trace and the gap/printing spacing between two traces. The results indicate that the targeted trace width and gap are subjected to certain errors, resulting in an imprecise actual print, that cannot be employed when designing a CAD model. Instead, a set of recommended values corresponding to the targeted values are acquired. Linear relations between the actual values and targeted values are obtained, which provides convenience for further design when considering using syringe-printing as an AM technique to print nano-silver traces.","PeriodicalId":500457,"journal":{"name":"IMAPS symposia and conferences","volume":"76 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135545494","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}