发布求助
文献互助 智能选刊 最新文献

IEEE Design & Test最新文献

筛选
英文 中文
Testing for Electromigration in Sub-5nm FinFET Memories 5 纳米以下 FinFET 存储器的电迁移测试
IF 2 4区 工程技术
IEEE Design & Test Pub Date : 2024-06-10 DOI: 10.1109/mdat.2024.3411527
Mahta Mayahinia, Mehdi Tahoori, Grigor Tshagharyan, Karen Amirkhanyan, Artur Ghukasyan, Gurgen Harutyunyan, Yervant Zorian
{"title":"Testing for Electromigration in Sub-5nm FinFET Memories","authors":"Mahta Mayahinia, Mehdi Tahoori, Grigor Tshagharyan, Karen Amirkhanyan, Artur Ghukasyan, Gurgen Harutyunyan, Yervant Zorian","doi":"10.1109/mdat.2024.3411527","DOIUrl":"https://doi.org/10.1109/mdat.2024.3411527","url":null,"abstract":"","PeriodicalId":48917,"journal":{"name":"IEEE Design & Test","volume":null,"pages":null},"PeriodicalIF":2.0,"publicationDate":"2024-06-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141938732","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Virtualizing USB Kernel Mode Debug (KMD) Class to Guest OS for native OS like debug experience. 将 USB 内核模式调试 (KMD) 类虚拟化到客户操作系统，以获得类似本地操作系统的调试体验。
IF 2 4区 工程技术
IEEE Design & Test Pub Date : 2024-06-04 DOI: 10.1109/mdat.2024.3409196
Rajaram Regupathy, Bhat M Uday, Nataraj Deshpande, Brandon Breitenstein, Mathias Nyman
{"title":"Virtualizing USB Kernel Mode Debug (KMD) Class to Guest OS for native OS like debug experience.","authors":"Rajaram Regupathy, Bhat M Uday, Nataraj Deshpande, Brandon Breitenstein, Mathias Nyman","doi":"10.1109/mdat.2024.3409196","DOIUrl":"https://doi.org/10.1109/mdat.2024.3409196","url":null,"abstract":"","PeriodicalId":48917,"journal":{"name":"IEEE Design & Test","volume":null,"pages":null},"PeriodicalIF":2.0,"publicationDate":"2024-06-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141938874","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Open-Source Multilevel Converter Power IC Design and Test 开源多电平转换器功率集成电路设计与测试
IF 2 4区 工程技术
IEEE Design & Test Pub Date : 2024-05-27 DOI: 10.1109/mdat.2024.3405892
Jorge Marin, Joel Gak, Christian A. Rojas, Alan H. Wilson-Veas, Nicolas Calarco, Matias Miguez, Alejandro R. Oliva, Nelson Salvador
{"title":"Open-Source Multilevel Converter Power IC Design and Test","authors":"Jorge Marin, Joel Gak, Christian A. Rojas, Alan H. Wilson-Veas, Nicolas Calarco, Matias Miguez, Alejandro R. Oliva, Nelson Salvador","doi":"10.1109/mdat.2024.3405892","DOIUrl":"https://doi.org/10.1109/mdat.2024.3405892","url":null,"abstract":"","PeriodicalId":48917,"journal":{"name":"IEEE Design & Test","volume":null,"pages":null},"PeriodicalIF":2.0,"publicationDate":"2024-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141171655","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Leveraging Generative AI for Rapid Design and Verification of a Vector Processor SoC 利用生成式人工智能快速设计和验证矢量处理器 SoC
IF 2 4区 工程技术
IEEE Design & Test Pub Date : 2024-05-22 DOI: 10.1109/mdat.2024.3404117
William Salcedo, Courtney McBeth, Sara Achour
{"title":"Leveraging Generative AI for Rapid Design and Verification of a Vector Processor SoC","authors":"William Salcedo, Courtney McBeth, Sara Achour","doi":"10.1109/mdat.2024.3404117","DOIUrl":"https://doi.org/10.1109/mdat.2024.3404117","url":null,"abstract":"","PeriodicalId":48917,"journal":{"name":"IEEE Design & Test","volume":null,"pages":null},"PeriodicalIF":2.0,"publicationDate":"2024-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141150677","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Soft and Hard Error Correction Techniques in STT-MRAM STT-MRAM 中的软硬纠错技术
IF 2 4区 工程技术
IEEE Design & Test Pub Date : 2024-05-01 DOI: 10.1109/mdat.2024.3395972
Surendra Hemaram, Mehdi B Tahoori, Francky Catthoor, Siddharth Rao, Sebastien Couet, Valerio Pica, Gouri Sankar Kar
{"title":"Soft and Hard Error Correction Techniques in STT-MRAM","authors":"Surendra Hemaram, Mehdi B Tahoori, Francky Catthoor, Siddharth Rao, Sebastien Couet, Valerio Pica, Gouri Sankar Kar","doi":"10.1109/mdat.2024.3395972","DOIUrl":"https://doi.org/10.1109/mdat.2024.3395972","url":null,"abstract":"","PeriodicalId":48917,"journal":{"name":"IEEE Design & Test","volume":null,"pages":null},"PeriodicalIF":2.0,"publicationDate":"2024-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140830988","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Secure FFT IP using C way Partitioning based Obfuscation and Fingerprint 使用基于 C 语言分区的混淆和指纹技术确保 FFT IP 安全
IF 2 4区 工程技术
IEEE Design & Test Pub Date : 2024-05-01 DOI: 10.1109/mdat.2024.3395981
Anirban Sengupta, Rahul Chaurasia
{"title":"Secure FFT IP using C way Partitioning based Obfuscation and Fingerprint","authors":"Anirban Sengupta, Rahul Chaurasia","doi":"10.1109/mdat.2024.3395981","DOIUrl":"https://doi.org/10.1109/mdat.2024.3395981","url":null,"abstract":"","PeriodicalId":48917,"journal":{"name":"IEEE Design & Test","volume":null,"pages":null},"PeriodicalIF":2.0,"publicationDate":"2024-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140830977","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Crypto-DSEDA: A Domain-specific EDA Flow for CiM-based Cryptographic Accelerators Crypto-DSEDA：基于 CiM 的密码加速器的特定领域 EDA 流程
IF 2 4区 工程技术
IEEE Design & Test Pub Date : 2024-05-01 DOI: 10.1109/mdat.2024.3395987
Rui Liu, Zerun Li, Xiaoyu Zhang, Wanqian Li, Libo Shen, Rui Tang, Zhejian Luo, Xiaoming Chen, Yinhe Han, Minghua Tang
{"title":"Crypto-DSEDA: A Domain-specific EDA Flow for CiM-based Cryptographic Accelerators","authors":"Rui Liu, Zerun Li, Xiaoyu Zhang, Wanqian Li, Libo Shen, Rui Tang, Zhejian Luo, Xiaoming Chen, Yinhe Han, Minghua Tang","doi":"10.1109/mdat.2024.3395987","DOIUrl":"https://doi.org/10.1109/mdat.2024.3395987","url":null,"abstract":"","PeriodicalId":48917,"journal":{"name":"IEEE Design & Test","volume":null,"pages":null},"PeriodicalIF":2.0,"publicationDate":"2024-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140830982","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Niklaus Wirth (1934–2024)—An Appreciation 尼克劳斯-沃思（1934-2024）--赏析
IF 2 4区 工程技术
IEEE Design & Test Pub Date : 2024-04-23 DOI: 10.1109/mdat.2024.3371372
Scott Davidson
{"title":"Niklaus Wirth (1934–2024)—An Appreciation","authors":"Scott Davidson","doi":"10.1109/mdat.2024.3371372","DOIUrl":"https://doi.org/10.1109/mdat.2024.3371372","url":null,"abstract":"Niklaus Wirth, the inventor of the languages Pascal and Modula, passed away on 1 January 2024, in Zurich. He was 89. His work, at the dawn of the structured programming revolution, affected many computer scientists deeply, and, I think, was a driver for our being able to produce amounts of working code that would be unimaginable in the 1960 s.","PeriodicalId":48917,"journal":{"name":"IEEE Design & Test","volume":null,"pages":null},"PeriodicalIF":2.0,"publicationDate":"2024-04-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140800791","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
IEEE Design & Test Publication Information IEEE 设计与测试出版物信息
IF 2 4区 工程技术
IEEE Design & Test Pub Date : 2024-04-23 DOI: 10.1109/mdat.2024.3372179
{"title":"IEEE Design & Test Publication Information","authors":"","doi":"10.1109/mdat.2024.3372179","DOIUrl":"https://doi.org/10.1109/mdat.2024.3372179","url":null,"abstract":"","PeriodicalId":48917,"journal":{"name":"IEEE Design & Test","volume":null,"pages":null},"PeriodicalIF":2.0,"publicationDate":"2024-04-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140800724","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Robust and Secure Systems 稳健安全的系统
IF 2 4区 工程技术
IEEE Design & Test Pub Date : 2024-04-23 DOI: 10.1109/mdat.2024.3373750
Partha Pratim Pande
{"title":"Robust and Secure Systems","authors":"Partha Pratim Pande","doi":"10.1109/mdat.2024.3373750","DOIUrl":"https://doi.org/10.1109/mdat.2024.3373750","url":null,"abstract":"<fig orientation=\"portrait\" position=\"float\" xmlns:mml=\"http://www.w3.org/1998/Math/MathML\" xmlns:xlink=\"http://www.w3.org/1999/xlink\"> <graphic orientation=\"portrait\" position=\"float\" xlink:href=\"pande-3373750.tif\"/> </fig> This Issue Consists of general interest articles. We also have one conference report in this issue.","PeriodicalId":48917,"journal":{"name":"IEEE Design & Test","volume":null,"pages":null},"PeriodicalIF":2.0,"publicationDate":"2024-04-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140800792","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
首页 上一页 下一页 尾页
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整，为了账户安全，请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
请完成安全验证×
相关产品
×
本文献相关产品
联系我们：info@booksci.cn Book学术提供免费学术资源搜索服务，方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号：481959085
Book学术官方微信