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IIRW 2022 Attendees
2022 IEEE International Integrated Reliability Workshop (IIRW) Pub Date : 2022-10-09 DOI: 10.1109/iirw56459.2022.10032745
{"title":"IIRW 2022 Attendees","authors":"","doi":"10.1109/iirw56459.2022.10032745","DOIUrl":"https://doi.org/10.1109/iirw56459.2022.10032745","url":null,"abstract":"","PeriodicalId":446436,"journal":{"name":"2022 IEEE International Integrated Reliability Workshop (IIRW)","volume":"128 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128188258","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
TCAD calibration for FinFET reliability predictions 用于FinFET可靠性预测的TCAD校准
2022 IEEE International Integrated Reliability Workshop (IIRW) Pub Date : 2022-10-09 DOI: 10.1109/IIRW56459.2022.10032762
Vishal Jha, M. Hoque, Mihilat Manahile, Joseph Rascon
{"title":"TCAD calibration for FinFET reliability predictions","authors":"Vishal Jha, M. Hoque, Mihilat Manahile, Joseph Rascon","doi":"10.1109/IIRW56459.2022.10032762","DOIUrl":"https://doi.org/10.1109/IIRW56459.2022.10032762","url":null,"abstract":"Semiconductor companies using advanced technologies with FinFETs often rely on the foundry-provided SPICE model for reliability prediction. However, SPICE model has limitations in terms of its valid range of the operating conditions like voltage, temperature, etc. TCAD (technology computer aided design) simulation is not only critical for understanding semiconductor reliability physics, it can also bridge the gap to predict the device level reliability beyond the valid range of SPICE model. It is therefore, critical to calibrate the TCAD so that it represents silicon data reasonably well. In this paper, the calibration methodologies used to match TCAD with silicon-based SPICE model have been discussed for a 16nm FinFET technology. Self-heating effects (SHE) in FinFETs can cause severe reliability degradation. A calibrated TCAD deck has been used in this paper to study the SHE in FinFET into the operating conditions beyond the valid range of SPICE model.","PeriodicalId":446436,"journal":{"name":"2022 IEEE International Integrated Reliability Workshop (IIRW)","volume":"450 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127609842","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
New Design Optimized and IC Area Efficient Rules for the Prevention of Plasma Processing Induced Damage on CMOS Circuit Reliability 防止等离子体加工损伤CMOS电路可靠性的新设计优化和IC面积有效规则
2022 IEEE International Integrated Reliability Workshop (IIRW) Pub Date : 2022-10-09 DOI: 10.1109/IIRW56459.2022.10032768
Andreas Martin, Bernd Schüler, B. Ankele, H. Nielen
{"title":"New Design Optimized and IC Area Efficient Rules for the Prevention of Plasma Processing Induced Damage on CMOS Circuit Reliability","authors":"Andreas Martin, Bernd Schüler, B. Ankele, H. Nielen","doi":"10.1109/IIRW56459.2022.10032768","DOIUrl":"https://doi.org/10.1109/IIRW56459.2022.10032768","url":null,"abstract":"Plasma processing induced charging damage of MOS transistors is a well-known reliability risk and can be a decrement to product yield or reliability lifetimes, which should be prevented by the implementation of design rules. Simple rules had their origin in the 90’s and since then were copied from process node to process node. They imply some substantial limitations for large and complex ICs on state of the art technology platforms, in particular for advanced well concepts or deep trenches, which introduce insulated areas on an IC. It requires a new rule concept for protective devices when a metal area, which is connected to a MOS transistor gate, exceeds a certain limit. It is shown here for MOS transistors on bulk-silicon with SiO2 and high-K dielectrics that with a new method the size of protective devices can be reduced and a chip designer gains more freedom in the layout process. Especially for complex and large IC’s this new rule concept will improve design robustness against plasma charging.","PeriodicalId":446436,"journal":{"name":"2022 IEEE International Integrated Reliability Workshop (IIRW)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126530156","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Impedance Spectroscopy of Ferroelectric Capacitors and Ferroelectric Tunnel Junctions 铁电电容器和铁电隧道结的阻抗谱
2022 IEEE International Integrated Reliability Workshop (IIRW) Pub Date : 2022-10-09 DOI: 10.1109/IIRW56459.2022.10032741
Lorenzo Benatti, Sara Vecchi, F. Puglisi
{"title":"Impedance Spectroscopy of Ferroelectric Capacitors and Ferroelectric Tunnel Junctions","authors":"Lorenzo Benatti, Sara Vecchi, F. Puglisi","doi":"10.1109/IIRW56459.2022.10032741","DOIUrl":"https://doi.org/10.1109/IIRW56459.2022.10032741","url":null,"abstract":"Ferroelectric devices are currently considered as a viable option for ultra-low power computing, thanks to their ability to act as memory units and synaptic weights in brainin-spired architectures. A common methodology to assess their response in different conditions (especially the role of material composition and charge trapping in ferroelectric switching) is impedance spectroscopy. However, test devices may be affected by the parasitic impedance of the metal lines contacting the electrodes of the device, which may alter the measured response and the results interpretation. In this work, we investigate the frequency response at different voltages of ferroelectric tunnel junction (FTJ) having a metal-dielectric-ferroelectric-metal (MDFM) stack, starting from the analysis of single layer capacitors (MFM and MDM). A simple but reliable method, validated by physics-based simulations, is proposed to estimate and remove the parasitic access impedance contribution, revealing the intrinsic device response. The method is used to quantify the intrinsic device-level variability of FTJs and to highlight for the first time the relation between the thickness of the dielectric layer, the phase composition of the ferroelectric, and the magnitude of the peak in the frequency response, usually thought as related to charge trapping only.","PeriodicalId":446436,"journal":{"name":"2022 IEEE International Integrated Reliability Workshop (IIRW)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125638167","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Reliability of Platinum Microheater Geometries for MEMS-Based Gas Sensors 用于mems气体传感器的铂微加热器几何结构的可靠性
2022 IEEE International Integrated Reliability Workshop (IIRW) Pub Date : 2022-10-09 DOI: 10.1109/IIRW56459.2022.10032744
L. Filipovic
{"title":"Reliability of Platinum Microheater Geometries for MEMS-Based Gas Sensors","authors":"L. Filipovic","doi":"10.1109/IIRW56459.2022.10032744","DOIUrl":"https://doi.org/10.1109/IIRW56459.2022.10032744","url":null,"abstract":"We model the electromigration (EM)- and thermo-migration (TM)-induced stress build-up in MEMS microheaters based on platinum spiral geometries in order to study the impact of several design decisions, including the film thickness, the rounding of sharp corners, and the introduction of a heatspreading plate. We observed that the TM-induced stress is dominant and found that reducing the film thickness results in a direct increase in the EM stress; however, the TM stress did not vary significantly even though the temperature uniformity was degraded. Rounding the sharp corners in the spiral geometry was shown to be beneficial in reducing the stress, with a direct correlation between increasing corner radius and reducing the induced stress. Furthermore, many microheater designs include a heat-spreading plate in order to improve the temperature uniformity across the microheater. In this study, we show that, while the heat-spreading plate has the desired effect, it comes at a cost of a significant increase in the power consumption (+70%) and in the EM- and TM-induced stress (+100%).","PeriodicalId":446436,"journal":{"name":"2022 IEEE International Integrated Reliability Workshop (IIRW)","volume":"103 Suppl 1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134190328","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Plasma induced charging damage (PID) from well charging in a BCD technology with deep trenches causing MOS device reliability lifetime degradation 在深沟BCD技术中，井内充电引起的等离子体诱导充电损伤(PID)会导致MOS器件可靠性寿命降低
2022 IEEE International Integrated Reliability Workshop (IIRW) Pub Date : 2022-10-09 DOI: 10.1109/IIRW56459.2022.10032749
Andreas Martin, Johannes Berger, Angelika Kamp, H. Nielen
{"title":"Plasma induced charging damage (PID) from well charging in a BCD technology with deep trenches causing MOS device reliability lifetime degradation","authors":"Andreas Martin, Johannes Berger, Angelika Kamp, H. Nielen","doi":"10.1109/IIRW56459.2022.10032749","DOIUrl":"https://doi.org/10.1109/IIRW56459.2022.10032749","url":null,"abstract":"As part of a PID process qualification a comprehensive well charging characterization is presented with home well and remote well charging stress measurements on nMOS and pMOS transistors with various well areas and stacked antenna sizes. Based on a literature review, contrary to most previous studies on MOS device lifetime degradation, a drift in threshold voltage was observed on a 7.5nm gate oxide but no increased dielectric leakage currents before or after a diagnostic PID stress. The PID assessment included various reliability stresses: constant current stress (CCS), hot carrier stress (HCS) and negative bias temperature instability (NBTI) stress. From the analyzed data a proposal is given for preventive antenna rules.","PeriodicalId":446436,"journal":{"name":"2022 IEEE International Integrated Reliability Workshop (IIRW)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125343663","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Black’s Law in Light of Low Frequency Pulsed Power Electromigration 低频脉冲功率电迁移中的布莱克定律
2022 IEEE International Integrated Reliability Workshop (IIRW) Pub Date : 2022-10-09 DOI: 10.1109/IIRW56459.2022.10032737
Mohd Mueen Ul Islam Mattoo, J. Lloyd
{"title":"Black’s Law in Light of Low Frequency Pulsed Power Electromigration","authors":"Mohd Mueen Ul Islam Mattoo, J. Lloyd","doi":"10.1109/IIRW56459.2022.10032737","DOIUrl":"https://doi.org/10.1109/IIRW56459.2022.10032737","url":null,"abstract":"The microelectronics industry continues to be plagued by pervasive electromigration (EM) failures at advanced node conductors. The continuous scaling coupled with higher operating current densities further accentuate the problem. EM testing with Pulsed Direct Current (PDC) show interesting results with how the current induced stress gradient evolves in absence of the electromigration driving force. It is well known that the current induced stress acts opposite to electromigration driving force, but that is not always the case. During the nucleation phase of the EM failure, the current induced stress gradient does act opposite to EM force but once the void is nucleated, stress gradient switches direction and acts in the direction of EM force causing damage even when the current is turned off.In such a scenario, Black’s law with a constant value of current density exponent can show errors while calculating the lifetime of devices under test. What can be of great interest is to see if this variation in the value of n is observed at different duty cycles of a pulsed current. And if yes, how disparate are the results from a conventional power law that is used for lifetime extrapolations for EM failure. A study of the current density exponent is therefore conducted as a function of duty cycle at accelerated test conditions. It was observed that in addition to the extended lifetime at lower duty cycles there was a gradual change in the value of the current density exponent as we went from lower duty cycles to direct current stress.","PeriodicalId":446436,"journal":{"name":"2022 IEEE International Integrated Reliability Workshop (IIRW)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130073246","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Surrogate-Based Modeling Techniques for Mapping Transistor Figures of Merit onto Compact Model Parameters 将晶体管性能图映射到紧凑模型参数的基于代理的建模技术
2022 IEEE International Integrated Reliability Workshop (IIRW) Pub Date : 2022-10-09 DOI: 10.1109/IIRW56459.2022.10032755
F. A. Velarde Gonzalez, J. Chávez-Hurtado, André Lange, T. Mikolajick
{"title":"Surrogate-Based Modeling Techniques for Mapping Transistor Figures of Merit onto Compact Model Parameters","authors":"F. A. Velarde Gonzalez, J. Chávez-Hurtado, André Lange, T. Mikolajick","doi":"10.1109/IIRW56459.2022.10032755","DOIUrl":"https://doi.org/10.1109/IIRW56459.2022.10032755","url":null,"abstract":"The electrical characteristics of a transistor can deviate from its nominal behavior due to process variations, aging mechanisms, etc. In order to ensure the reliability of a design, circuit level simulations capturing this altered transistor behaviors have become increasingly important. In this paper we study the use of surrogate models to map changes in key transistor’s figures of merit into compact model parameters in order to shorten the path from reliability measurements to simulations.","PeriodicalId":446436,"journal":{"name":"2022 IEEE International Integrated Reliability Workshop (IIRW)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132632561","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Electrically Detected Magnetic Resonance Study of High-Field Stressing in SiOC:H Films SiOC:H薄膜中高场应力的电探测磁共振研究
2022 IEEE International Integrated Reliability Workshop (IIRW) Pub Date : 2022-10-09 DOI: 10.1109/IIRW56459.2022.10032735
F. Sharov, S. Moxim, M. J. Elko, S. King, P. Lenahan
{"title":"Electrically Detected Magnetic Resonance Study of High-Field Stressing in SiOC:H Films","authors":"F. Sharov, S. Moxim, M. J. Elko, S. King, P. Lenahan","doi":"10.1109/IIRW56459.2022.10032735","DOIUrl":"https://doi.org/10.1109/IIRW56459.2022.10032735","url":null,"abstract":"We have investigated the initial stages of dielectric breakdown in high-field stressed low-k dielectric (SiOC:H) capacitor structures. Our study makes use of electrically detected magnetic resonance (EDMR) via spin-dependent trap-assisted tunneling (SDTAT). We find at least two distinct stages precede the breakdown of the dielectrics: a very fast initial stage associated with an overall decrease in leakage current and a rapid generation of Si dangling bonds, and a much slower subsequent intermediate stage associated with an overall recovery of leakage current with little further Si dangling bond trap generation. The generation of these Si dangling bonds early-on in the device’s lifetime seems to be associated with the initial decrease in conductance very early in device lifetimes observed in previous electrical studies.","PeriodicalId":446436,"journal":{"name":"2022 IEEE International Integrated Reliability Workshop (IIRW)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126041239","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Investigating Reliability of NIR QD-based Photodiodes Under Bias and Light Stres 基于近红外量子点的光电二极管在偏置和光应力下的可靠性研究
2022 IEEE International Integrated Reliability Workshop (IIRW) Pub Date : 2022-10-09 DOI: 10.1109/IIRW56459.2022.10032751
I. Hammad, J. Coignus, D. Ney, Celestin Doyen, Sebastien Perrin, S. Ricq, F. Cacho, G. Wantz, X. Federspiel, D. Roy, E. Josse
{"title":"Investigating Reliability of NIR QD-based Photodiodes Under Bias and Light Stres","authors":"I. Hammad, J. Coignus, D. Ney, Celestin Doyen, Sebastien Perrin, S. Ricq, F. Cacho, G. Wantz, X. Federspiel, D. Roy, E. Josse","doi":"10.1109/IIRW56459.2022.10032751","DOIUrl":"https://doi.org/10.1109/IIRW56459.2022.10032751","url":null,"abstract":"Semiconductor Quantum Dots (QDs) have invoked a high interest in the industrial optoelectronic applications due to their high photogeneration ability compared with Silicon materials, in addition to the ease of adjusting them to interact with specific wavelengths by controlling the QD size, whether as a light emitter such as screens or as a light receiver such as imaging applications. We investigate the reliability performance of an optimized (PbS) Quantum Film (QF) based photodiode, and we demonstrate that AC operations drastically improve the reliability performance of QD-based photodiodes.","PeriodicalId":446436,"journal":{"name":"2022 IEEE International Integrated Reliability Workshop (IIRW)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129608309","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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