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2007 18th European Conference on Circuit Theory and Design最新文献

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Highly-accurate propagation delay analytical model of an RC-circuit with a ramp input 坡道输入rc电路的高精度传播延迟分析模型
2007 18th European Conference on Circuit Theory and Design Pub Date : 2007-08-01 DOI: 10.1109/ECCTD.2007.4529684
R. Mita, G. Palumbo
{"title":"Highly-accurate propagation delay analytical model of an RC-circuit with a ramp input","authors":"R. Mita, G. Palumbo","doi":"10.1109/ECCTD.2007.4529684","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529684","url":null,"abstract":"In this paper, a simple analytical model which allows the estimation of the propagation delay of an RC circuit with a linear input is presented. The closed-form model can be used to evaluate the propagation delay of CMOS gates or wires in modern VLSI and ULSI process. Despite its simplicity, the model error has a maximum value of 2 % and in general is lower than 1%.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123745490","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Second-level testing revisited and applications to NIST SP800-22 重新进行二级测试并应用于NIST SP800-22
2007 18th European Conference on Circuit Theory and Design Pub Date : 2007-08-01 DOI: 10.1109/ECCTD.2007.4529674
Fabio Pareschi, R. Rovatti, G. Setti
{"title":"Second-level testing revisited and applications to NIST SP800-22","authors":"Fabio Pareschi, R. Rovatti, G. Setti","doi":"10.1109/ECCTD.2007.4529674","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529674","url":null,"abstract":"The use of second-level testing to reduce Type II errors in RNG validation was suggested from the very beginning though rarely employed in real-world cases. Yet, as security requirements become more critical and the availability of even faster RNG more commonplace, second-level testing will be key to distinguishing RNGs based on the quality of very large chunks of their output. This paper addresses some principles governing the proper design of second-level tests (i.e. how to divide available data into chunks and how to compute second-level p-values) as well as its implications on the design of the underlying basic tests.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123899496","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Code compression for ARM7 embedded systems ARM7嵌入式系统的代码压缩
2007 18th European Conference on Circuit Theory and Design Pub Date : 2007-08-01 DOI: 10.1109/ECCTD.2007.4529689
Valeria Garofalo, E. Napoli, N. Petra, A. Strollo
{"title":"Code compression for ARM7 embedded systems","authors":"Valeria Garofalo, E. Napoli, N. Petra, A. Strollo","doi":"10.1109/ECCTD.2007.4529689","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529689","url":null,"abstract":"A detailed analysis of different code compression algorithms is provided in this paper. The performances of the algorithms have been tested on ARM codes whose size is below 32 KB. Code compression performances have been considered including the compression overheads due to the decoding tables, to the alignment and to the tables for random access to the compressed code. We have analyzed Huffman, Tunstall, LZ77 and Class-based techniques. Optimal performances are provided by Class Based algorithms with an average compression ratio of 64%. For this algorithm we have realized a static decompression engine that provides, after an initial latency of three clock cycles, one 32b instruction for clock cycle.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125088211","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Floating voltage-controlled current sources for electrical impedance tomography 用于电阻抗断层扫描的浮动电压控制电流源
2007 18th European Conference on Circuit Theory and Design Pub Date : 2007-08-01 DOI: 10.1109/ECCTD.2007.4529573
H. Hong, M. Rahal, A. Demosthenous, R. Bayford
{"title":"Floating voltage-controlled current sources for electrical impedance tomography","authors":"H. Hong, M. Rahal, A. Demosthenous, R. Bayford","doi":"10.1109/ECCTD.2007.4529573","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529573","url":null,"abstract":"The design of a current source for wideband electrical impedance tomography medical instrumentation is a challenging task. This paper describes two simple OTA-based floating voltage-controlled current sources (VCCSs) for this application. Both designs are suitable for VLSI implementation and overcome the drawbacks of existing opamp-based discrete VCCS designs. The floating VCCSs are designed to drive loads of 100 Omega to 2 kOmega with current amplitudes of up to 500 muA. The working frequency band is between 100 Hz to 1 MHz. Simulated results using a 0.35-mum CMOS process technology are presented to show the operation of the circuits.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"72 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123813509","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 21
Analysis of synchronization phenomena in star-coupled Wien-bridge oscillators using distorted waves 星耦合维恩桥振荡器中畸变波同步现象分析
2007 18th European Conference on Circuit Theory and Design Pub Date : 2007-08-01 DOI: 10.1109/ECCTD.2007.4529725
S. Moro, T. Matsumoto
{"title":"Analysis of synchronization phenomena in star-coupled Wien-bridge oscillators using distorted waves","authors":"S. Moro, T. Matsumoto","doi":"10.1109/ECCTD.2007.4529725","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529725","url":null,"abstract":"In this paper, we discuss the synchronization phenomena in star-coupled Wien-bridge oscillators by investigating the power consumption of the system using the distorted waves with fundamental frequency component and third harmonics component. The results suggest that the harmonics component can govern the synchronization phenomena, and why 120deg phase shift is stably excited.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127930649","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Effects of digital switching noise on analog circuits performance 数字开关噪声对模拟电路性能的影响
2007 18th European Conference on Circuit Theory and Design Pub Date : 2007-08-01 DOI: 10.1109/ECCTD.2007.4529561
G. Boselli, G. Trucco, V. Liberali
{"title":"Effects of digital switching noise on analog circuits performance","authors":"G. Boselli, G. Trucco, V. Liberali","doi":"10.1109/ECCTD.2007.4529561","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529561","url":null,"abstract":"In this paper, we discuss generation of digital switching noise and its propagation through substrate and interconnection parasitics. Effects of switching noise on analog voltage references and radio-frequency blocks are presented. Both simulated and measured results confirmed that crosstalk effects are strongly dependent on substrate and package type. Isolation strategies must be specifically designed for a mixed-signal chip, as they could even worse crosstalk if they are not properly designed accounting for values of parasitics.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"52 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128711105","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
Study of discretization of two-dimensional sliding mode control systems 二维滑模控制系统的离散化研究
2007 18th European Conference on Circuit Theory and Design Pub Date : 2007-08-01 DOI: 10.1109/ECCTD.2007.4529699
Z. Galias, Xinghuo Yu
{"title":"Study of discretization of two-dimensional sliding mode control systems","authors":"Z. Galias, Xinghuo Yu","doi":"10.1109/ECCTD.2007.4529699","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529699","url":null,"abstract":"Zero-order holder discretization of two-dimensional sliding mode control system is studied. Steady-state behaviors are classified and their bounds are found. Conditions under which the system trajectory in the steady state spends at most two iterations on each side of the sliding surface are presented. The existence of complex switching patterns for arbitrarily small discretization steps is confirmed. Theoretical results are illustrated with simulation examples.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"63 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130744923","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
A new algorithm for high speed speech and audio coding 一种新的高速语音和音频编码算法
2007 18th European Conference on Circuit Theory and Design Pub Date : 2007-08-01 DOI: 10.1109/ECCTD.2007.4529566
Ümit Güz, Hakan Gürkan, B. Yarman
{"title":"A new algorithm for high speed speech and audio coding","authors":"Ümit Güz, Hakan Gürkan, B. Yarman","doi":"10.1109/ECCTD.2007.4529566","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529566","url":null,"abstract":"In this work, a new mathematical modeling approach is proposed for the representation of the speech and audio signals. This approach is based on the generation of the so called predefined signature sequence (PSS) and predefined envelope sequence (PES) sets. After the generation process of the PSS and PES sets, they are clustered by effective k-means clustering algorithm and the PSS and PES are redefined by using the centroids of the clusters. By using this approach, the drawbacks such as the size of the sets, speed of the reconstruction process (computational complexity) which arise in our proposed methods previously are highly eliminated. In spite of these improvements, the initial results proved that, the quality of the reconstructed signals remains within the limitations of the acceptable hearing quality.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"64 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128311919","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
High performance bootstrapped CMOS low to high-swing level-converter for on-chip interconnects 用于片上互连的高性能自启动CMOS低至高摆幅电平转换器
2007 18th European Conference on Circuit Theory and Design Pub Date : 2007-08-01 DOI: 10.1109/ECCTD.2007.4529716
José C. García, J. Montiel-Nelson, S. Nooshabadi
{"title":"High performance bootstrapped CMOS low to high-swing level-converter for on-chip interconnects","authors":"José C. García, J. Montiel-Nelson, S. Nooshabadi","doi":"10.1109/ECCTD.2007.4529716","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529716","url":null,"abstract":"This paper proposes a high performance and low power bootstrapped CMOS level-converter (lf-converter) for level restoration from the low-swing on the interconnect line to high-swing at the receiver side. The proposed lf-converter reduces the power-delay product by 83% to 90%, in comparison with the previously reported bootstrapped level-converter circuit (lrc-converter), when implemented on 0.13 mum CMOS 1.2V technology. The active area for lf-converter is 18.7 mum2, which is 3.9% less than the counterpart lrc-converter circuit.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126816648","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
12-bit 2.4 GHz D/A upconverter 12位2.4 GHz D/A上变频
2007 18th European Conference on Circuit Theory and Design Pub Date : 2007-08-01 DOI: 10.1109/ECCTD.2007.4529578
V. Turunen, Tero Nieminen, M. Kosunen, K. Halonen
{"title":"12-bit 2.4 GHz D/A upconverter","authors":"V. Turunen, Tero Nieminen, M. Kosunen, K. Halonen","doi":"10.1109/ECCTD.2007.4529578","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529578","url":null,"abstract":"This paper describes the design and implementation of a upconverting D/A converter (DAC). Designed converter is capable of upconverting two 12-bit 60 MHz (in-phase and quadrature) signal bands around 2.4 GHz radio frequency. Upconversion is implemented by reorganizing switching scheme of a traditional current-steering D/A converter. Designed with 0.13 mum CMOS process, total area and estimated power consumption including DSP are 8.14 mm2 and 520 mW respectively.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"210 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113977855","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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