A. Sarmiento-Reyes, J. Torres, L. Hernández-Martínez, M. D. Anda
{"title":"FFinder: A MAPLE-based CAD frame for identifying feedback loops in electric circuits","authors":"A. Sarmiento-Reyes, J. Torres, L. Hernández-Martínez, M. D. Anda","doi":"10.1109/ECCTD.2007.4529759","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529759","url":null,"abstract":"A MAPLE-based package for detecting feedback loops -positive and negative - has been developed. The tool accepts the circuit description either through a SPICE-like input file or via a schematic editor. The method for finding feedback loops is based on a slightly modified version of the well-known LU decomposition algorithm. In the paper, the idea behind this approach is explained by resorting to topology- based concepts of the LU decomposition. The tool delivers symbolic expressions of the transfer functions belonging to the feedback loops that are embedded in the circuit. These transfer functions can be used to establish ulterior design guidelines.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134282326","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A. D. Grasso, S. Pennisi, F. Centurelli, G. Scotti, A. Trifiletti
{"title":"CMOS Miller OTA with body-biased output stage","authors":"A. D. Grasso, S. Pennisi, F. Centurelli, G. Scotti, A. Trifiletti","doi":"10.1109/ECCTD.2007.4529652","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529652","url":null,"abstract":"A bias technique for low-voltage class AB amplifiers is presented. The approach exploits the bulk terminal to set the output quiescent current of a two-stage class-AB CMOS OTA in a reliable manner and without reducing the maximum swing capability. Simulations on a designed example using a 0.25-mum CMOS process show the viability of the approach.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133191615","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"3.125 Gb/s temperature compensated CMOS optical preamplifier with automatic gain control","authors":"J. M. Pozo, S. Celma, M. T. Sanz, J. P. Alegre","doi":"10.1109/ECCTD.2007.4529522","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529522","url":null,"abstract":"This paper presents a low-voltage variable preamplifier with automatic gain control, which works at 3.125 Gb/s in the optical standard 10Gbase-LX4. The system incorporates a circuit that minimizes the temperature effects. The preamplifier achieves adaptive transresistance, 60-74 dBOmega, with an almost constant bandwidth, 2.2 GHz, and with no peaks in the frequency response. The circuit was designed in 0.18 mum CMOS technology with a single 1.8 V supply voltage.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"111 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132086612","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A collision-free time-to-first spike camera architecture based on a winner-take-all network","authors":"N. Massari, S. A. Jawed, M. Gottardi","doi":"10.1109/ECCTD.2007.4529755","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529755","url":null,"abstract":"A new type of asynchronous time-based digital camera is here presented. The sensor architecture is characterized by a new analog low-power winner take all (WTA) network shared among all the pixels of the array. This circuit detects the most illuminated pixel and transmits it through the channel by queuing the other competitors. An iterative algorithm allows to read-out the entire array, temporally dispatching the information by means of an asynchronous read-out circuit placed at column and row level. The pixel, designed with a 0.35 mum CMOS technology and consisting of 28 transistors, performs a simulated average power consumption less than 10 nW @ 1.8 V for an impinging light power of 100 muW/cm2.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"92 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133950043","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Derivation of the sliding domain for a buck-based switching amplifier in wideband signal tracking applications","authors":"L. Marco, E. Alarcón","doi":"10.1109/ECCTD.2007.4529696","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529696","url":null,"abstract":"One of the major drawbacks that precludes the use of sliding-mode control wideband signal tracking in buck-based switching power amplifiers is the lack of a design-oriented analysis of tracking bandwidth limits. In this paper the tracking limits for a linear-surface sliding-mode controlled ideal buck converter are addressed for different representative cases, namely, for a single tone, two tones, multiple tone, and a generalization to an arbitrary wideband signal. Analytical design-oriented equations are matched with simulations both for synthetic single-tone and arbitrary wideband noise signal as well as for the envelope signal corresponding to the EDGE standard in an envelope elimination and restoration technique polar RF transmitter architecture.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123899027","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"On reconstruction of conductances in resistor grids from boundary measurements","authors":"Piotr Zegarmistrz, Z. Galias","doi":"10.1109/ECCTD.2007.4529713","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529713","url":null,"abstract":"In this work we investigate the problem of reconstruction of conductances in resistor grids. The algorithm proposed by Curtis and Morrow is studied here in terms of numerical stability. We also test its performance in the presence of measurement errors. We show that measurement errors can deteriorate the performance of the algorithm even for small grid sizes and that the algorithm is numerically unstable for larger grids. We propose several methods for improving the algorithm and test the performance of its modified versions.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"82 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127742950","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Breakdown of synchronization in chaotic oscillators and noisy oscillators","authors":"Ryo Imabayashi, Y. Uwate, Y. Nishio","doi":"10.1109/ECCTD.2007.4529748","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529748","url":null,"abstract":"In this study, the breakdown of synchronization observed from four coupled chaotic oscillators is investigated. In order to understand the phenomenon, the model of coupled modified van der Pol oscillators with noise is considered. The comparison of the coupled chaotic oscillators with the coupled modified van der Pol oscillators with noise gives us some interesting results.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127819439","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
H. Barthélemy, S. Bourdel, J. Gaubert, S. Meillére
{"title":"OOK/NCP-FSK modulator based on coupled open-closed-loop VCOs","authors":"H. Barthélemy, S. Bourdel, J. Gaubert, S. Meillére","doi":"10.1109/ECCTD.2007.4529612","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529612","url":null,"abstract":"In this paper a simple FSK/OOK modulator based on a proposed CMOS coupled voltage controlled oscillators is presented. In FSK mode the circuit is a non-continuous phase FSK (NCPFSK) which exhibits a relatively low phase discontinuity at the frequency transition times. The proposed modulator is built from CMOS inverters. The circuit is self biased and the frequency of oscillations can be easily shifted by opening and closing the open loop of each oscillators. Regarding technology, the modulator, which uses any active inductor, is able to operate at high frequency and provides digital output with suitable phase noise. Simulation result from typical parameters of a 0.35 mum CMOS Process is given. The circuit functioning has been also acted from measurements completed from prototypes fabricated with HFE4069 from Philips Semiconductor [1].","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128594029","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Davide Brandano, M. Delgado-Restituto, J. Ruiz-Amaya, Á. Rodríguez-Vázquez
{"title":"A 5.3mW, 2.4GHz ESD protected Low-Noise Amplifier in a 0.13μm RFCMOS technology","authors":"Davide Brandano, M. Delgado-Restituto, J. Ruiz-Amaya, Á. Rodríguez-Vázquez","doi":"10.1109/ECCTD.2007.4529539","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529539","url":null,"abstract":"An Electrostatic Discharge (ESD) protected Low- Noise Amplifier (LNA) for the 2.4 GHz ISM band designed in a 0.13 mum standard RFCMOS technology is presented. The amplifier, including packaging effects, achieves 16.8 dB power gain, reflexion coefficients S11, S22 < -30 dB over the 2.4 GHz ISM band, a peak noise figure of 1.8 dB, and an IIP3 of 1 dBm, while drawing less than 4.5 mA dc biasing current from the 1.2 V power supply. Further, the LNA withstands a Human Body Model (HBM) ESD stress up to plusmn2.0 kV, by means of the additional custom protection circuitry.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"61 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129233824","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Polynomial fault diagnosis of linear analog circuits","authors":"Z. Garczarczyk","doi":"10.1109/ECCTD.2007.4529728","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529728","url":null,"abstract":"In this paper a diagnostic method for analog electronic circuits is presented. The approach is based on determination of the variations of circuit functions with use of higher order sensitivity coefficients. Knowing values of sensitivity coefficients one can formulate multivariate polynomial equations. The solution of test equations with respect to element's deviations results in fault identification. This task can be realized by using Grobner bases to transform a nonlinear equation into triangular form. It is solved by successive computation of the univariate polynomial equation and back substitution. Solution of the polynomial equation is treated as the eigenvalue problem of companion matrix by QR algorithm. Numerical results are presented to clarify method and prove its efficiency.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"107 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116666308","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}