{"title":"Compensated circuit for Low Dropout Regulator having stable load regulation after consideration of bonding wire resistance","authors":"S. Heng, C. Pham","doi":"10.1109/ECCTD.2007.4529551","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529551","url":null,"abstract":"A compensation circuit which considered a resistance of a bonding wire for improving a load regulation of a low dropout regulator (LDO) is presented. The circuit is designed a conventional 0.18 mu CMOS process that provides a high performance of a load regulation for a LDO despite of a high load current and a high bonding wire resistance. The proposed circuit is not affected by an input to the LDO and an output voltage setting as well as a variation of temperature and threshold voltages of transistors. The output voltage of the LDO which can be maintained at 0.5% fluctuation when a load current change from 0[mA] to 300[mA] is confirmed by simulation results of HSPICE. This characteristic plays an importance role for the design of LDOs at low output voltage with a high output current.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"56 7-8","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114036846","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Compensation method of amplitude error in sawtooth wave generator","authors":"N. Takai, Y. Fujimura","doi":"10.1109/ECCTD.2007.4529553","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529553","url":null,"abstract":"Switching regulator is one of the solutions for mobile equipment's power supply because of its high efficiency, small size, and low power consumption characteristics. To enhance the performance of the switching regulator, high and accurate frequency oscillation of sawtooth wave generator in the regulator is required. In this paper, compensation method of amplitude error caused by delay time of comparator and logic circuit in the sawtooth generator is proposed. The compensation of the error achieves an accurate and high oscillation frequency. SPICE simulations are performed to verify the validity of the proposed method.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124346098","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Using high pass sigma-delta modulation for Class-S power amplifiers","authors":"Stephen Ralph, R. Farrell","doi":"10.1109/ECCTD.2007.4529694","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529694","url":null,"abstract":"Switching power amplifiers offer the potential for superior efficiencies if used at radio frequencies. However many existing bandpass architectures require a switching frequency four times that of the signal, making implementation difficult. In this paper we propose to use a high-pass sigma-delta modulator to reduce the switching rate to only twice of the signal. We will present a solution to the problem of the reflected image and demonstrate it's viability for use in mobile telephony.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115217163","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
N. Medrano, M. T. Sanz, P. Martínez, S. Celma, G. Zatorre
{"title":"An adaptive circuit for low-power sensor processing: Mismatch effects","authors":"N. Medrano, M. T. Sanz, P. Martínez, S. Celma, G. Zatorre","doi":"10.1109/ECCTD.2007.4529571","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529571","url":null,"abstract":"This paper presents a study of mismatch effects in a digitally programmable analogue processor designed for small embedded applications. Circuit programmability allows for its adaptation to deviations in circuit operation or environmental effects. Starting from circuit simulation data, the system-level operation is modelled, showing its robustness to circuit mismatch. Simulation results of the proposed processor applied to compensate the response of a sinusoidal sensor and its robustness to mismatch are presented.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"99 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123481721","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
J. Salzmann, J. Guyomard, O. P. Linderholm, B. Kolomiets, Harsha Kasi, M. Pâques, M. Simonutti, É. Dubus, Serge G. Rosolen, J. Sahel, P. Renaud, A. Safran, S. Picaud
{"title":"Retinal prosthesis : Testing prototypes on a dystrophic rat retina","authors":"J. Salzmann, J. Guyomard, O. P. Linderholm, B. Kolomiets, Harsha Kasi, M. Pâques, M. Simonutti, É. Dubus, Serge G. Rosolen, J. Sahel, P. Renaud, A. Safran, S. Picaud","doi":"10.1109/ECCTD.2007.4529596","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529596","url":null,"abstract":"The retina contains a mosaic of photoreceptors coupled to a intelligent neural network extracting important information on object edges, movements. This visual information is then transferred to the brain through the optic nerve. In pathologies like age macular degeneration or retinitis pigmentosa, photoreceptor degeneration leaves the retinal neuronal network unstimulated. Retinal prostheses propose to stimulate electrically this neuronal network to restore a useful vision for locomotion and reading. We are testing prototypes of subretinal prostheses on the retina of dystrophic rats with photoreceptor degeneration. Our experiments have enabled us to introduce reproducibly these prototypes into the subretinal space, to observe regularly the implant in vivo and measure longitudinally the electrode impedance. These in vivo measurements can then be correlated with the histological examination of the retinal tissue. In parallel, techniques were implemented to record retinal ganglion cell activity on the isolated retina to test different stimulation protocols. Classic retinal ganglion cell responses can be recorded with these techniques and allow to measure ganglion cell response to electrical stimulation. These studies should therefore contribute to improving the selectivity in the electrode retinal stimulation by retinal prostheses.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129514404","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Road map representation of s-expanded symbolic network functions","authors":"M. Pierzchala, Benedykt Rodanski","doi":"10.1109/ECCTD.2007.4529732","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529732","url":null,"abstract":"A new two-graph approach is presented for the generation of exact symbolic network functions in the form of rational polynomials of the complex frequency variable s for analogue circuits. The closed-loop circuit representation is used, but the numerator and denominator of the desired transfer function are obtained separately without using any sorting process. In this method each symbolic expression for a coefficient at particular power of s is obtained immediately without any operation on polynomials. For compact representation of terms in symbolic network functions a new notation of expressions called the road map is presented. This notation has also the advantage that in the process of the repetitive evaluation of transfer function for the analyzed network we do not have to calculate the whole expression but only to update the terms which are changed. We consider R,C,L,E,I,cs networks (R,C,L,E,I,cs stand for resistors, capacitors, inductors, independent voltage and current sources, and all types of controlled sources, respectively).","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129643289","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
D. Andrade, F. Martorell, M. Pons, F. Moll, A. Rubio
{"title":"Power supply noise and logic error probability","authors":"D. Andrade, F. Martorell, M. Pons, F. Moll, A. Rubio","doi":"10.1109/ECCTD.2007.4529559","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529559","url":null,"abstract":"Voltage fluctuations caused by parasitic impedances in the power supply rails of modern ICs are a major concern in nowadays ICs. The voltage fluctuations are spread out to the diverse nodes of the internal sections causing two effects: a degradation of performances mainly impacting gate delays and a noisy contamination of the quiescent levels of the logic that drives the node. Both effects are presented together, in this paper, showing than both are a cause of errors in modern and future digital circuits. The paper groups both error mechanisms and shows how the global error rate is related with the voltage deviation and the period of the clock of the digital system.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129680577","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"CMOS circuit implementation of a coupled phase oscillator system using pulse modulation approach","authors":"Daisuke Atuti, Naoto Katoh, K. Nakada, T. Morie","doi":"10.1109/ECCTD.2007.4529724","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529724","url":null,"abstract":"This paper proposes a CMOS circuit using a pulse modulation approach for realizing nonlinear dynamics with phase variables. The phase variables are represented by pulse-width modulation signals, and an arbitrary nonlinear transform function is generated by using the corresponding nonlinear current waveform sampled with pulse-phase modulation signals. We have designed a coupled phase oscillator circuit using a 0.25 mum CMOS process. The measurement results using a fabricated chip demonstrate that the proposed circuit operates correctly as a nonlinear dynamical system with phase variables.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128917996","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"The minimum energetical principle in electric and magnetic circuits","authors":"H. Andrei, F. Spinei","doi":"10.1109/ECCTD.2007.4529744","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529744","url":null,"abstract":"The paper describe the authors' further preoccupation towards an extension of the minimum energetical principle in stationary regime establish for the d.c. and a.c. circuits, to the magnetic circuits respectively to the circuit with capacitors. It tries to give an interpretation to the results obtained from the minimization of an energetic functional corresponding to the circuit under study.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127576600","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
M. Dimopoulos, D. K. Papakostas, A. Hatzopoulos, E. Konstantinidis, Alexios Spyronasios
{"title":"Design and development of a versatile testing system for analog and mixed-signal circuits","authors":"M. Dimopoulos, D. K. Papakostas, A. Hatzopoulos, E. Konstantinidis, Alexios Spyronasios","doi":"10.1109/ECCTD.2007.4529729","DOIUrl":"https://doi.org/10.1109/ECCTD.2007.4529729","url":null,"abstract":"In this paper the design and development of a test system based on a microcontroller is presented. This system is versatile to test various analog and mixed-signal systems without any hardware modification. Preliminary results from the application of the system to the production line testing of emergency light products are presented showing the effectiveness of the proposed testing scheme.","PeriodicalId":445822,"journal":{"name":"2007 18th European Conference on Circuit Theory and Design","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127774470","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}