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2018 International Conference on Recent Trends in Electrical, Control and Communication (RTECC)最新文献

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Power Quality Assessment for Indian Railway Traction A Case study 印度铁路牵引系统电能质量评估案例研究
2018 International Conference on Recent Trends in Electrical, Control and Communication (RTECC) Pub Date : 2018-03-01 DOI: 10.1109/RTECC.2018.8625633
A. Amsaveni, C. Sharmeela, V. Jeyalakshmi, S. Prakash
{"title":"Power Quality Assessment for Indian Railway Traction A Case study","authors":"A. Amsaveni, C. Sharmeela, V. Jeyalakshmi, S. Prakash","doi":"10.1109/RTECC.2018.8625633","DOIUrl":"https://doi.org/10.1109/RTECC.2018.8625633","url":null,"abstract":"Harmonics is the one of the major Power Quality (PQ) problems in power systems majorly due to the use of non-linear characteristics of the equipments. Power electronics based converters are the main cause for non-linear waveform in power system. Secondary distribution systems are mainly affected because of higher proliferation of power electronics based loads. Compare to transmission system, distribution systems are highly affected due to harmonics. Electric traction is used to power the electric locomotive system for movement of the train. Traction uses the power electronic based components for controlling the speed of electric locomotive system. However the non-linear current characteristics injected from the traction power converters impacts the power quality in transmission system. The power quality measurements are carried to find the harmonic current injection by traction power converters in Avadi and Thondayarpet substation in Chennai, Tamilnadu and probable solution techniques for mitigating the harmonics.","PeriodicalId":445688,"journal":{"name":"2018 International Conference on Recent Trends in Electrical, Control and Communication (RTECC)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129665291","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Generalized Symmetrical/Asymmetrical Single-phase MLI Topology 广义对称/不对称单相MLI拓扑
2018 International Conference on Recent Trends in Electrical, Control and Communication (RTECC) Pub Date : 2018-03-01 DOI: 10.1109/RTECC.2018.8625642
B. Mahato, Sudhanshu Mittal, P. K. Nayak
{"title":"Generalized Symmetrical/Asymmetrical Single-phase MLI Topology","authors":"B. Mahato, Sudhanshu Mittal, P. K. Nayak","doi":"10.1109/RTECC.2018.8625642","DOIUrl":"https://doi.org/10.1109/RTECC.2018.8625642","url":null,"abstract":"The efficient and effective power conversion is the most vital part of the various applications related to industrial drives. The quality of the output voltage is preferred to be sinusoidal in nature to have an efficient power conversion. The requirement of the filter circuit in the conventional inverter is overshadowed by the use of multilevel inverters. Research in the field of multilevel inverters with reduced components are gaining attention due to some of the major factors like economic cost, installation space, bulkiness, complexity. A novel and generalized multilevel topology is proposed in this paper that can be well implemented for any input voltage magnitudes. The topology has been compared further with the other existed reduced switch topologies to proof the effectiveness of the topology. A 7-level and 9-level proposed inverter is executed in MATLAB environment and the corresponding results are added in this paper.","PeriodicalId":445688,"journal":{"name":"2018 International Conference on Recent Trends in Electrical, Control and Communication (RTECC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129824242","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
VLSI SYSTEMS FOR SIMULTANEOUS IN LOGIC SIMULATION Vlsi系统同时在逻辑仿真
2018 International Conference on Recent Trends in Electrical, Control and Communication (RTECC) Pub Date : 2018-03-01 DOI: 10.1109/rtecc.2018.8625665
S. Karthik, K. Priyadarsini, V. Jeanshilpa
{"title":"VLSI SYSTEMS FOR SIMULTANEOUS IN LOGIC SIMULATION","authors":"S. Karthik, K. Priyadarsini, V. Jeanshilpa","doi":"10.1109/rtecc.2018.8625665","DOIUrl":"https://doi.org/10.1109/rtecc.2018.8625665","url":null,"abstract":"Logic simulation used in conjunction with functional verification verifies the correctness of an integrated circuit. Verification methodologies can be formal or simulation based. Formal based methodologies use exhaustive mathematical techniques to prove circuit responses to all possible inputs and all possible reachable states of the circuit conform to specification. These methods do not rely on the generation of input to verify the design. Simulation based methodologies aims at uncovering design errors by thoroughly exercising the current model of the circuit. The aim of this paper is to present a platform for efficient parallel simulation of high level specification of the system written using RTL/C/C++ language. For the experimental purpose, the Zybo a heterogeneous platform board has been considered in this work. Zybo board is a development kit which provides the designer to develop or test designs. The board contains all the essential interfaces communications and associate functions to enable a wide range of applications. The most significant part on this board is Xilinx Zynq-7000 All Programmable SoC (Zynq SoC) which consists of a dual ARM Cortex-A9 CPU based PS (Processing System) as well as Xilinx hardware PL (Programmable Logic) on the same chip and supports hardware-software co-design.","PeriodicalId":445688,"journal":{"name":"2018 International Conference on Recent Trends in Electrical, Control and Communication (RTECC)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127875963","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Steady State Analysis in Continuous Conduction Mode of a Novel Z-Source Boost Hybrid Converter 一种新型z源升压混合变换器连续导通模式的稳态分析
2018 International Conference on Recent Trends in Electrical, Control and Communication (RTECC) Pub Date : 2018-03-01 DOI: 10.1109/RTECC.2018.8625675
S. Jeyasudha, B. Geethalakshmi
{"title":"Steady State Analysis in Continuous Conduction Mode of a Novel Z-Source Boost Hybrid Converter","authors":"S. Jeyasudha, B. Geethalakshmi","doi":"10.1109/RTECC.2018.8625675","DOIUrl":"https://doi.org/10.1109/RTECC.2018.8625675","url":null,"abstract":"Combination of Z-source network with the converter or inverter and modification of Z-source inverter is a new trend in research for improving the voltage gain ratio of the converter. Due to a low voltage output of the solar PV (SPV) system, it requires some boosting technique to increase the DC to DC gain ratio or DC to AC gain ratio. For improving the low output voltage of SPV system, a Z-source network is connected in front of any converter and inverter. Z-source network has the property to get the high voltage gain thus the efficiency of the converter is improved. This work briefly explains the improvement of the output voltage gain, by combining the Z-source network with boost derived hybrid converter (BDHC) called Z-source boost hybrid converter (ZSBHC) for solar PV applications. BDHC is a dual output and single input converter which produces AC and DC output simultaneously. The proposed ZSBHC topology improves AC and DC load efficiency, power processing capability and provides inherent shoot-through and reliability. The steady-state analysis of this topology is done in continuous conduction mode. The improvement of the boost factor and each component boosting ratio are derived and compared with the conventional Z-source inverter. The proposed converter circuit is simulated using MATLAB and the output is compared with the conventional BDHC and it is proved that the ZSBHC shows superior performance.","PeriodicalId":445688,"journal":{"name":"2018 International Conference on Recent Trends in Electrical, Control and Communication (RTECC)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125361743","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A New Control Approach on Positioning of Heat Exchangers in Automotive Front End Cooling Module 汽车前端冷却模块换热器定位控制新方法
2018 International Conference on Recent Trends in Electrical, Control and Communication (RTECC) Pub Date : 2018-03-01 DOI: 10.1109/RTECC.2018.8625689
S. Baskar, Doss S Prince Arockia
{"title":"A New Control Approach on Positioning of Heat Exchangers in Automotive Front End Cooling Module","authors":"S. Baskar, Doss S Prince Arockia","doi":"10.1109/RTECC.2018.8625689","DOIUrl":"https://doi.org/10.1109/RTECC.2018.8625689","url":null,"abstract":"Conventionally in automotive vehicles the heat exchangers like condenser and radiator are placed in a 'one behind other' configuration. In such arrangement radiator fan has to work more to carry away the heat rejected by both heat exchangers and whenever the condenser heat transfer capacity becomes excess, the engine cooling performance gets deteriorated. In this work, CFD and analytical study have been carried out to investigate the relation between heat exchanger configuration and its thermal performance. The obtained results layout the foundation to develop a control unit which decides the condenser position to be in a configuration 'one behind other'(obo) or 'one below other'(obelo). It is recommended that 'obo' configuration does well at vehicle speed less than 30kmph and beyond that 'obelo' can be chosen. This control approach along with the Active Grille Shutter system will provide better engine cooling system performance and fuel economy. The availability of cooling air flow and top tank temperature are evaluated in the both configurations.","PeriodicalId":445688,"journal":{"name":"2018 International Conference on Recent Trends in Electrical, Control and Communication (RTECC)","volume":"309 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121403907","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Investigation of optimized Si1-xGex 3D-fin-TFET by varying the fin height 改变翅片高度优化Si1-xGex 3d翅片- tfet的研究
2018 International Conference on Recent Trends in Electrical, Control and Communication (RTECC) Pub Date : 2018-03-01 DOI: 10.1109/RTECC.2018.8625655
Narasimhulu Thoti, R. Haritha, Nandini Madineni
{"title":"Investigation of optimized Si1-xGex 3D-fin-TFET by varying the fin height","authors":"Narasimhulu Thoti, R. Haritha, Nandini Madineni","doi":"10.1109/RTECC.2018.8625655","DOIUrl":"https://doi.org/10.1109/RTECC.2018.8625655","url":null,"abstract":"TFETs are the competitive structures in replacement of MOSFET. Our designed structure is based on material variation with the use of SiGe compound for 3D fin-TFET construction by varying the fin-height. In this work, DC and RF characterization of the device is also reported. The characteristics have been analysed with the variation in fin-height and material variation at different regions of the structure. The drive current (ID) of ~4×10-6 A with low leakage current of 0.1×10-15A and least subthreshold swing of 18.23mV/decade have reported. Other DC characteristics such as transconductance, output impedance and RF metrics such as unity gain cutoff frequency, maximum oscillation frequencies have been reported with maximum ft of 65 GHz and fmax of 200 GHz. An optimized gate height of H = 10nm (AR = 1) is finalized for observing better performance metrics for the proposed device structure.","PeriodicalId":445688,"journal":{"name":"2018 International Conference on Recent Trends in Electrical, Control and Communication (RTECC)","volume":"71 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133952041","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
DESIGN OF HALF ELLIPTIC CIRCULAR SLOT MONOPOLE ANTENNA ON A PARTIAL OR DEFECTED RECTANGULAR GROUND PLANE FOR WLAN & UWB APPLICATIONS 半椭圆圆槽单极天线在部分或有缺陷的矩形接地面上的设计
2018 International Conference on Recent Trends in Electrical, Control and Communication (RTECC) Pub Date : 2018-03-01 DOI: 10.1109/RTECC.2018.8625637
A. Priya, S. Mohideen
{"title":"DESIGN OF HALF ELLIPTIC CIRCULAR SLOT MONOPOLE ANTENNA ON A PARTIAL OR DEFECTED RECTANGULAR GROUND PLANE FOR WLAN & UWB APPLICATIONS","authors":"A. Priya, S. Mohideen","doi":"10.1109/RTECC.2018.8625637","DOIUrl":"https://doi.org/10.1109/RTECC.2018.8625637","url":null,"abstract":"Monopole antenna is a wideband antenna working under the principle of travelling waves. The Half Elliptic antenna structure is taken as the reference and it is optimized and designed for WLAN (5.2 GHz resonant frequency) and the entire UWB (3.1 – 10.6 GHz) applications. The structure that is proposed in this paper consists of an optimized half ellipse with a circular slot on the top side and a partial rectangular ground plane at the bottom side. The Partial ground plane as a defected ground plane structure has been introduced in order to improve the bandwidth. The simulation has been carried out in ANSYS HFSS V13.0 with FR4 substrate (€r=4.4) of thickness 1.6mm. The results show that it works for WLAN frequency as well as UWB frequency range.","PeriodicalId":445688,"journal":{"name":"2018 International Conference on Recent Trends in Electrical, Control and Communication (RTECC)","volume":"64 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121674626","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
On Line Monitoring of Higher Rated Alternator using Automated Generator Capability Curve Administer 利用自动发电能力曲线管理对高额定交流发电机进行在线监测
2018 International Conference on Recent Trends in Electrical, Control and Communication (RTECC) Pub Date : 2018-03-01 DOI: 10.1109/RTECC.2018.8625687
G. Sangeetha, S. Sherine, K. Arputharaju, S. Prakash
{"title":"On Line Monitoring of Higher Rated Alternator using Automated Generator Capability Curve Administer","authors":"G. Sangeetha, S. Sherine, K. Arputharaju, S. Prakash","doi":"10.1109/RTECC.2018.8625687","DOIUrl":"https://doi.org/10.1109/RTECC.2018.8625687","url":null,"abstract":"On Line Monitoring of Higher Rated Alternator of 30MW and above capacity using Automated Generator Capability Curve Administer provides the correct operating regions of the Alternator. By giving the Alternator ratings from the design data, the Administer draws the Capability curve for the given Alternator by using MATLAB program. The operating point of the running Alternator is also drawn in the Capability curve after giving the Voltage and Current inputs from Potential Transformer and Current Transformer respectively. The running Alternator parameters are calculated from the characteristics of the Capability curve by using MATLAB program and display all the parameters of the running Alternator including its Field Current and Load Angle which are not being measured in the conventional metering system used.","PeriodicalId":445688,"journal":{"name":"2018 International Conference on Recent Trends in Electrical, Control and Communication (RTECC)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115134140","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
N-Level Cascade Multilevel Converter with optimum number of switches 具有最佳开关数量的n级级多电平变换器
2018 International Conference on Recent Trends in Electrical, Control and Communication (RTECC) Pub Date : 2018-03-01 DOI: 10.1109/RTECC.2018.8625638
B. Mahato, Sudhanshu Mittal, P. K. Nayak
{"title":"N-Level Cascade Multilevel Converter with optimum number of switches","authors":"B. Mahato, Sudhanshu Mittal, P. K. Nayak","doi":"10.1109/RTECC.2018.8625638","DOIUrl":"https://doi.org/10.1109/RTECC.2018.8625638","url":null,"abstract":"Among various reasons, reduction of harmonic content is the major reason for which multilevel inverters has been chosen over the classical two-level converter The current rating or the voltage rating of the multilevel inverter becomes a compound of specific switches and thus the power rating of the inverter can surpass the limit executed by the individual switches. Thus, in order to increase the voltage levels with the lesser number of components, a reduced switch topology is developed and is tested in MATLAB/Simulink environment.A single phase N-level inverter is proposed in this paper for both the symmetric and asymmetric voltage source distribution. In addition, prototype model of 9-level symmetrical inverter and 21-level asymmetrical inverter is developed in MATLAB. Nevertheless, the topology is further compared with other existed reduced switches topology and found to be better in terms of complexity, economic cost and maintenance.","PeriodicalId":445688,"journal":{"name":"2018 International Conference on Recent Trends in Electrical, Control and Communication (RTECC)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132749860","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Nine Shaped Dual Wideband Rectangular Dielectric Resonator Antenna 九形双宽带矩形介质谐振器天线
2018 International Conference on Recent Trends in Electrical, Control and Communication (RTECC) Pub Date : 2018-03-01 DOI: 10.1109/RTECC.2018.8625669
E. Vinodha, S. Raghavan
{"title":"Nine Shaped Dual Wideband Rectangular Dielectric Resonator Antenna","authors":"E. Vinodha, S. Raghavan","doi":"10.1109/RTECC.2018.8625669","DOIUrl":"https://doi.org/10.1109/RTECC.2018.8625669","url":null,"abstract":"An objective of this paper is to design a dual wideband Rectangular Dielectric Resonator Antenna (RDRA) using a novel Nine-shape with simple feeding technique. This newly shaped antenna is fed by triple stub micro-strip feedline. This type of feeding results in good coupling and wide bandwidth. Our proposed Nine-shaped DRA works at \"C\" band, \"X\" band and \"Ku\" band frequencies and provides dual bands with broad bandwidth nearer to 45.59%, and 28.1% respectively. The Nine-shaped structure and the triple stub microstrip feeding provides a dual wide band operation.","PeriodicalId":445688,"journal":{"name":"2018 International Conference on Recent Trends in Electrical, Control and Communication (RTECC)","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132194918","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
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