2016 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)最新文献_第2页

A Verilog-A model of a silicon resistive strip for particle detectors 一个Verilog-A模型的硅电阻带粒子探测器

2016 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) Pub Date : 2016-06-27 DOI: 10.1109/SMACD.2016.7520749

N. Franch, O. Alonso, Á. Diéguez, S. Hidalgo, I. Vila

引用次数: 0

Compressed-sampling-based behavioural modelling technique for wideband RF transmitter leakage cancellation system 基于压缩采样的宽带射频发射机泄漏抵消系统行为建模技术

2016 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) Pub Date : 2016-06-27 DOI: 10.1109/SMACD.2016.7520742

Han Su, Ziming Wang, R. Farrell

引用次数: 0

Power-down synthesis for analog circuits including switch sizing 模拟电路的断电合成，包括开关尺寸

2016 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) Pub Date : 2016-06-27 DOI: 10.1109/SMACD.2016.7520645

M. Zwerger, G. Shrivastava, H. Graeb

{"title":"Power-down synthesis for analog circuits including switch sizing","authors":"M. Zwerger, G. Shrivastava, H. Graeb","doi":"10.1109/SMACD.2016.7520645","DOIUrl":"https://doi.org/10.1109/SMACD.2016.7520645","url":null,"abstract":"In order to reduce the power consumption of a system-on-chip, analog circuits can be switched off when not needed with the help of power-down switches. The power-down synthesis task comprises the structural synthesis of the power-down circuitry and switch sizing. A first approach for automatic structural synthesis was published recently. This paper completes the power-down synthesis task by an effective, efficient and very easy sizing heuristic. An optimum size for the power-down switches is identified. The sizing approach is derived from exhaustive simulation results for three different amplifier circuits and a voltage-controlled ring oscillator. The variations in the power-on performance values, the power consumption during power-down mode, the power-on to power-down settling time and the power-down to power-on settling time are determined for different sizes of the power-down switches. From the simulation results, it can be concluded that the technology's minimal switch size can be chosen for the switches. This simple sizing step completes state-of-the-art power-down synthesis with the missing sizing step.","PeriodicalId":441203,"journal":{"name":"2016 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-06-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128816715","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

MATLAB & VHDL-AMS co-simulation environment for IR-UWB transceiver design MATLAB与VHDL-AMS联合仿真环境下IR-UWB收发器设计

2016 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) Pub Date : 2016-06-27 DOI: 10.1109/SMACD.2016.7520737

O. Z. Batur, Günhan Dündar, M. Koca

引用次数: 2

Finite difference method for electromigration analysis of multi-branch interconnects 多支路互连电迁移分析的有限差分法

2016 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) Pub Date : 2016-06-27 DOI: 10.1109/SMACD.2016.7520752

Chase Cook, Zeyu Sun, Taeyoung Kim, S. Tan

{"title":"Finite difference method for electromigration analysis of multi-branch interconnects","authors":"Chase Cook, Zeyu Sun, Taeyoung Kim, S. Tan","doi":"10.1109/SMACD.2016.7520752","DOIUrl":"https://doi.org/10.1109/SMACD.2016.7520752","url":null,"abstract":"Electromigration (EM) in VLSI chips has become a major reliability issues in nanometer VLSI design. Traditional compact EM models cannot give accurate predictions about the stress evolution over all stress conditions for complicated multi-branch interconnect structures. In this paper, we try to mitigate this problem by performing finite difference method (FDM) for the EM effects in multi-branch interconnects based on the kinetics of the first principle of EM physics. We start with the partial differential equations that describe the fundamental hydrostatic stress evolution for both the void nucleation and void growth phases with proper boundary and initial conditions for typical multi-branch metal wires: the single 2-terminal wire, and the straight-line 3-terminal wires. The new FDM for EM analysis approach can easily accommodate existing non-uniformly distributed residual stress, while existing compact EM models cannot. Time varying temperature and current, which are also difficult to model with existing methods, can also be considered with this method. Numerical results show that the proposed FDM EM analysis method agrees with the COMSOL based finite element method in terms of accuracy.","PeriodicalId":441203,"journal":{"name":"2016 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-06-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123945003","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 16

A MATLAB graphical user interface for battery design and simulation; from cell test data to real-world automotive simulation 电池设计与仿真的MATLAB图形用户界面从电池测试数据到真实世界的汽车模拟

2016 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) Pub Date : 2016-06-27 DOI: 10.1109/SMACD.2016.7520715

A. Fotouhi, N. Shateri, D. Auger, S. Longo, K. Propp, R. Purkayastha, Mark Wild

{"title":"A MATLAB graphical user interface for battery design and simulation; from cell test data to real-world automotive simulation","authors":"A. Fotouhi, N. Shateri, D. Auger, S. Longo, K. Propp, R. Purkayastha, Mark Wild","doi":"10.1109/SMACD.2016.7520715","DOIUrl":"https://doi.org/10.1109/SMACD.2016.7520715","url":null,"abstract":"This paper describes a graphical user interface (GUI) tool designed to support cell design and development of manufacturing processes for an automotive battery application. The GUI is built using the MATLAB environment and is able to load and analyze raw test data as its input. After data processing, a cell model is fitted to the experimental data using system identification techniques. The cell model's parameters (such as open-circuit-voltage and ohmic resistance) are displayed to the user as functions of state of charge, providing a visual understanding of the cell's characteristics. The GUI is also able to simulate the performance of a full battery pack consisting of a specified number of single cells using standard driving cycles and a generic electric vehicle model. After a simulation, the battery designer is able to see how well the vehicle would be able to follow the driving cycle using the tested cells. Although the GUI is developed for an automotive application, it could be extended to other applications as well. The GUI has been designed to be easily used by non-simulation experts (i.e. battery designers or electrochemists) and it is fully automated, only requiring the user to supply the location of raw test data.","PeriodicalId":441203,"journal":{"name":"2016 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","volume":"83 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-06-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121146519","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 10

SCALES: A high speed simulator tool for pipeline A/D converters scale:用于管道A/D转换器的高速模拟器工具

2016 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) Pub Date : 2016-06-27 DOI: 10.1109/SMACD.2016.7520751

C. Silva, J. Guilherme, N. Horta

引用次数: 0

An improved algorithm for the analysis of partially saturated ferrite inductors in switching power supplies 开关电源部分饱和铁氧体电感分析的改进算法

2016 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) Pub Date : 2016-06-27 DOI: 10.1109/SMACD.2016.7520650

G. D. Capua, N. Femia, Kateryna Stoyka

引用次数: 5

Modeling of fully printed organic field effect transistors for circuit design and simulation 全印刷有机场效应晶体管的电路设计与仿真建模

2016 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) Pub Date : 2016-06-27 DOI: 10.1109/SMACD.2016.7520648

Olka Kaveh, B. K. Boroujeni, Daniel Kasemann, K. Leo, F. Ellinger

{"title":"Modeling of fully printed organic field effect transistors for circuit design and simulation","authors":"Olka Kaveh, B. K. Boroujeni, Daniel Kasemann, K. Leo, F. Ellinger","doi":"10.1109/SMACD.2016.7520648","DOIUrl":"https://doi.org/10.1109/SMACD.2016.7520648","url":null,"abstract":"Organic field effect transistors (OFETs) have significantly improved during recent years. However, there is still a lack of complete compact models for these devices, due to different materials, device structures, and manufacturing processes. Previous studies on compact OFET modeling have only considered static I-V characteristics, which are subject to the bias-stress effect. In this study, for the first time, two different large-signal OFET models are optimized to small-signal experimental data, which are less sensitive to the bias-stress effect. Li's and Estrada's models are studied overall I-V regions, from sub-threshold to above-threshold, and from linear to saturation region with unified formulations. It is found that Estrada's model fits better to the trans-conductance, whereas the Li's model fits better to the intrinsic gain. Both models are implemented in ADS circuit simulator, using the Verilog-A programming language. The bootstrapped amplifier is simulated and is compared with measurement data.","PeriodicalId":441203,"journal":{"name":"2016 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-06-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114603812","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Reliable design methodology: The combined effect of radiation, variability and temperature 可靠的设计方法:辐射、变异性和温度的综合效应

2016 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) Pub Date : 2016-06-27 DOI: 10.1109/SMACD.2016.7520646

F. García-Redondo, M. López-Vallejo, Hernán Aparicio, P. Ituero

引用次数: 3