2016 IEEE International Integrated Reliability Workshop (IIRW)最新文献

筛选
英文 中文
On the effect of interface traps on the carrier distribution function during hot-carrier degradation 热载流子降解过程中界面陷阱对载流子分布函数的影响
2016 IEEE International Integrated Reliability Workshop (IIRW) Pub Date : 1900-01-01 DOI: 10.1109/IIRW.2016.7904911
S. Tyaginov, A. Makarov, M. Jech, J. Franco, P. Sharma, B. Kaczer, T. Grasser
{"title":"On the effect of interface traps on the carrier distribution function during hot-carrier degradation","authors":"S. Tyaginov, A. Makarov, M. Jech, J. Franco, P. Sharma, B. Kaczer, T. Grasser","doi":"10.1109/IIRW.2016.7904911","DOIUrl":"https://doi.org/10.1109/IIRW.2016.7904911","url":null,"abstract":"We study the effect of interface states, generated during hot-carrier stress, on the carrier energy distribution functions (DFs) and check whether this effect perturbs the results of our hot-carrier degradation model. These studies are performed using SiON nMOSFETs with a gate length of 65 nm as exemplary devices. We carry out simulations with different values of the spatially uniform interface state density (Nit) as well as with a coordinate dependent Nit evaluated for real stress conditions. In both cases, the effect of Nit on carrier distribution functions appears to be strong. As for the degradation characteristics, we show that Nit profiles computed with perturbed distribution functions can be substantially different from those obtained with non-perturbed DFs, especially at long stress times. The same trend is visible also for changes in the linear drain current. Additional simulations performed for operating conditions with and without the effect of Nit show that if this effect is not taken into account, this leads to severe underestimation of the device life-time.","PeriodicalId":436183,"journal":{"name":"2016 IEEE International Integrated Reliability Workshop (IIRW)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124899747","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Bias temperature instability and its correlation to flicker (1/f) noise in FinFETs 偏置温度不稳定性及其与闪烁(1/f)噪声的关系
2016 IEEE International Integrated Reliability Workshop (IIRW) Pub Date : 1900-01-01 DOI: 10.1109/IIRW.2016.7904913
Y. Ding, D. Misra, P. Srinivasan
{"title":"Bias temperature instability and its correlation to flicker (1/f) noise in FinFETs","authors":"Y. Ding, D. Misra, P. Srinivasan","doi":"10.1109/IIRW.2016.7904913","DOIUrl":"https://doi.org/10.1109/IIRW.2016.7904913","url":null,"abstract":"Flicker noise is used as a diagnostic tool to analyze the degradation mechanism before and after BTI in thin and thick gate oxide FinFETs. Although nFETs show lower BTI than pFETs for thick gate oxides, comparable BTI degradation is noticed between thin gate oxide nFETs and pFETs. Analyses of noise spectra reveal that: the degradation of oxide occurs closer to metal gate rather than channel during BTI. The distance between the defect location and channel plays an important role in noise mechanism for nMOS. As the defects are closer to the channel and coulombic scattering is enhanced, the noise in nFETs is modified from carrier number fluctuation to mobility fluctuation model.","PeriodicalId":436183,"journal":{"name":"2016 IEEE International Integrated Reliability Workshop (IIRW)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121564216","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
The sources of erase voltage variability in split-gate flash memory cell arrays 分栅闪存单元阵列中擦除电压变异性的来源
2016 IEEE International Integrated Reliability Workshop (IIRW) Pub Date : 1900-01-01 DOI: 10.1109/IIRW.2016.7904890
Y. Tkachev, J. Walls
{"title":"The sources of erase voltage variability in split-gate flash memory cell arrays","authors":"Y. Tkachev, J. Walls","doi":"10.1109/IIRW.2016.7904890","DOIUrl":"https://doi.org/10.1109/IIRW.2016.7904890","url":null,"abstract":"We performed a comprehensive analysis of the voltage-to-erase (Verase) distribution in split-gate flash memory cell arrays. It was shown that Verase distribution is mostly determined by the tunneling voltage variations. Other factors, such as distributions of coupling ratio and FG channel parameters, have a minor effect on Verase variability.","PeriodicalId":436183,"journal":{"name":"2016 IEEE International Integrated Reliability Workshop (IIRW)","volume":"105 ","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120866927","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
SiC power device reliability SiC功率器件可靠性
2016 IEEE International Integrated Reliability Workshop (IIRW) Pub Date : 1900-01-01 DOI: 10.1109/IIRW.2016.7904895
D. Gajewski, B. Hull, D. Lichtenwalner, S. Ryu, E. Bonelli, H. Mustain, Gangyao Wang, S. Allen, J. Palmour
{"title":"SiC power device reliability","authors":"D. Gajewski, B. Hull, D. Lichtenwalner, S. Ryu, E. Bonelli, H. Mustain, Gangyao Wang, S. Allen, J. Palmour","doi":"10.1109/IIRW.2016.7904895","DOIUrl":"https://doi.org/10.1109/IIRW.2016.7904895","url":null,"abstract":"SiC power devices offer performance advantages over competing Si-based power devices, due to the wide bandgap and other key materials properties of 4H-SiC. For example, SiC can more easily be used to fabricate MOSFETs with very high voltage ratings (up to 10 kV), and with lower switching losses. The reliability of SiC power devices is excellent and has continued to improve due to continuing advancements in SiC substrate quality, epitaxial growth capabilities, and device processing. This has enabled the continually accelerating growth of SiC power device commercial adoption. This paper reviews the wear-out mechanisms and intrinsic reliability performance of power SiC devices as characterized by time-dependent dielectric breakdown (TDDB), accelerated life test high temperature reverse bias (ALT-HTRB), terrestrial neutron exposure, and power cycling. This paper also reviews some of the known failure mechanisms that have been characterized and addressed through technological advances. Finally, we present field return data that demonstrates less than 5 FIT (fails per billion device hours) for commercially produced SiC MOSFETs and Schottky diodes, with over 2 trillion device field hours.","PeriodicalId":436183,"journal":{"name":"2016 IEEE International Integrated Reliability Workshop (IIRW)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115666403","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 36
On the distribution of the FET threshold voltage shifts due to individual charged gate oxide defects 个别带电栅极氧化物缺陷引起的场效应晶体管阈值电压漂移分布
2016 IEEE International Integrated Reliability Workshop (IIRW) Pub Date : 1900-01-01 DOI: 10.1109/IIRW.2016.7904892
B. Kaczer, S. Amoroso, R. Hussin, A. Asenov, J. Franco, P. Weckx, P. Roussel, G. Rzepa, T. Grasser, N. Horiguchi
{"title":"On the distribution of the FET threshold voltage shifts due to individual charged gate oxide defects","authors":"B. Kaczer, S. Amoroso, R. Hussin, A. Asenov, J. Franco, P. Weckx, P. Roussel, G. Rzepa, T. Grasser, N. Horiguchi","doi":"10.1109/IIRW.2016.7904892","DOIUrl":"https://doi.org/10.1109/IIRW.2016.7904892","url":null,"abstract":"The factors contributing to the FET threshold voltage shift Δν<inf>th</inf> caused by charging of an individual trap, such as during Random Telegraph Noise (RTN), are discussed by analyzing device-calibrated simulation data. The Δν<inf>th</inf> distribution is observed to be a convolution of i) the position of the trap along the channel, randomized by ii) the random dopant distribution (RDD) responsible for percolative transport in the FET channel. In our TCAD simulation data the RDD component is observed to be roughly log-normally distributed. “Meta-simulations” varying this log-normal component are able to qualitatively reproduce a range of observed Δν<inf>th</inf> distribution shapes. In longer devices and/or in devices with high channel doping (or otherwise highly randomized channel potentials), the Δν<inf>th</inf> distribution tends toward log-normal. In the other, more relevant cases, the exponential Δν<inf>th</inf> distribution appears to be an acceptable approximation.","PeriodicalId":436183,"journal":{"name":"2016 IEEE International Integrated Reliability Workshop (IIRW)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126136496","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Reliability of power devices: Bias-induced threshold voltage instability and dielectric breakdown in GaN MIS-HEMTs 功率器件的可靠性:GaN miss - hemt中偏置诱发的阈值电压不稳定和介电击穿
2016 IEEE International Integrated Reliability Workshop (IIRW) Pub Date : 1900-01-01 DOI: 10.1109/IIRW.2016.7904896
G. Meneghesso, D. Bisi, I. Rossetto, M. Ruzzarin, M. Meneghini, E. Zanoni
{"title":"Reliability of power devices: Bias-induced threshold voltage instability and dielectric breakdown in GaN MIS-HEMTs","authors":"G. Meneghesso, D. Bisi, I. Rossetto, M. Ruzzarin, M. Meneghini, E. Zanoni","doi":"10.1109/IIRW.2016.7904896","DOIUrl":"https://doi.org/10.1109/IIRW.2016.7904896","url":null,"abstract":"This paper reviews the most relevant threshold-voltage instabilities and dielectric breakdown mechanisms in GaN-based transistors with metal-insulator-semiconductor gate. Metal-insulator-semiconductor (MIS) high electron mobility transistors (HEMTs) with partially-recessed gate have been submitted to pulsed and constant voltage stress, with the aim of evaluating the impact of charge trapping processes and dielectric breakdown on device performance and reliability. Three different dielectrics were considered for this investigation: SiN deposited by rapid thermal chemical vapour deposition (RTCVD), SiN deposited by plasma enhanced atomic layer deposition (PE-ALD), and Al2O3 deposited by atomic layer deposition (ALD). The role of bias and temperature is extensively investigated and discussed. The results obtained within this paper are critically compared to previous literature reports, to provide a more complete view of the state-of-the-art.","PeriodicalId":436183,"journal":{"name":"2016 IEEE International Integrated Reliability Workshop (IIRW)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115490452","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
相关产品
×
本文献相关产品
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信