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2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)最新文献

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A 124–152 GHz > 15-dBm $mathbf{P}_{text{sat}}$ 28-nm CMOS PA Using Chebyshev Artificial- Transmission-Line-Based Matching for Wideband Power Splitting and Combining 基于Chebyshev人工传输线匹配的124ghz - 152ghz > 15dbm $mathbf{P}_{text{sat}}$ 28nm CMOS放大器用于宽带功率分合
2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2022-06-19 DOI: 10.1109/RFIC54546.2022.9863134
Jincheng Zhang, Tianxiang Wu, Yong Chen, Junyan Ren, Shunli Ma
{"title":"A 124–152 GHz > 15-dBm $mathbf{P}_{text{sat}}$ 28-nm CMOS PA Using Chebyshev Artificial- Transmission-Line-Based Matching for Wideband Power Splitting and Combining","authors":"Jincheng Zhang, Tianxiang Wu, Yong Chen, Junyan Ren, Shunli Ma","doi":"10.1109/RFIC54546.2022.9863134","DOIUrl":"https://doi.org/10.1109/RFIC54546.2022.9863134","url":null,"abstract":"This paper presents a 124–152 GHz power amplifier (PA) with >15 dBm saturation output power $(mathbf{P}_{text{sat}})$ in a 28-nm CMOS process. Low-coupling transformer-based fourth-order matching networks are used to extend the bandwidth (BW) with low insertion loss and compact area. A four-way Chebyshev-type artificial-transmission-line-based power combiner is proposed to further improve the output power without sacrificing BW. The measurement results show that this P A can achieve a peak gain of 22.6 $mathbf{dB}$ with 28 GHz 3-dB BW. The in-band $mathbf{P}_{mathbf{sat}}$ is >15 dBm with a maximum output power of 16.2 dBm at 135 GHz. The total area of the chip is $mathbf{0.66}mathbf{times}mathbf{0.73} mathbf{mm}^{mathbf{2}}$ •","PeriodicalId":415294,"journal":{"name":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125049026","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
280.2/309.2 GHz, 18.2/9.3 dB Gain, 1.48/1.4 dB Gain-per-mW, 3-Stage Amplifiers in 65nm CMOS Adopting $text{Double-embedded-}G_{max}text{-core}$ 280.2/309.2 GHz, 18.2/9.3 dB增益，1.48/1.4 dB / mw增益，65nm CMOS三级放大器采用$text{双嵌入-}G_{max}text{-core}$
2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2022-06-19 DOI: 10.1109/RFIC54546.2022.9863110
Byeonghun Yun, Dae-Woong Park, Chan-Gyu Choi, Ho-Jin Song, Sang-Gug Lee
{"title":"280.2/309.2 GHz, 18.2/9.3 dB Gain, 1.48/1.4 dB Gain-per-mW, 3-Stage Amplifiers in 65nm CMOS Adopting $text{Double-embedded-}G_{max}text{-core}$","authors":"Byeonghun Yun, Dae-Woong Park, Chan-Gyu Choi, Ho-Jin Song, Sang-Gug Lee","doi":"10.1109/RFIC54546.2022.9863110","DOIUrl":"https://doi.org/10.1109/RFIC54546.2022.9863110","url":null,"abstract":"This paper reports a sub-THz high-gain amplifier design technique which is more flexible and suitable for performance optimization based on a $text{double}text{-}text{embedded}text{-}G_{max}text{-}text{core}$. The $text{double}text{-} text{embedded} text{-}G_{max}text{-}text{cort}$ is implemented by adopting an additional linear, lossless, and reciprocal (LLR) network that satisfies the $G_{max}text{-}text{condition} (Y_{21}/Y_{12}=text{-}G_{max})$ on to an $Ntext{-}text{stage} text{pseudo}text{-}G_{max}text{-}text{cores}$ where each stage satisfies the stability factor $k_{i}!!=!!1$ and phase delay of $2mathrm{m}pi/N$. Implemented in a 65nm CMOS, the three-stage 280.2 and 309.2 GHz amplifiers achieve power gains of 18.2 and 9.3 dB and gain-per-mW of 1.48 and 1.4 dB/mW, respectively.","PeriodicalId":415294,"journal":{"name":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131096419","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A DC-120 GHz SPDT Switch Based on 22 nm FD-SOI SLVT NFETs with Substrate Isolation Rings Towards Increased Shunt Impedance 一种基于22 nm FD-SOI SLVT非场效应管的DC-120 GHz SPDT开关，其衬底隔离环增加了分流阻抗
2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2022-06-19 DOI: 10.1109/RFIC54546.2022.9863217
M. Rack, L. Nyssens, Q. Courte, D. Lederer, J. Raskin
{"title":"A DC-120 GHz SPDT Switch Based on 22 nm FD-SOI SLVT NFETs with Substrate Isolation Rings Towards Increased Shunt Impedance","authors":"M. Rack, L. Nyssens, Q. Courte, D. Lederer, J. Raskin","doi":"10.1109/RFIC54546.2022.9863217","DOIUrl":"https://doi.org/10.1109/RFIC54546.2022.9863217","url":null,"abstract":"A DC-120 GHz SPDT switch is proposed using GlobalFoundries' 22FDX® SLVT devices with improved substrate isolation rings. For mm-wave switch applications, 22FDX® offers BFMOAT devices that include substrate isolation zones beneath them to reduce high-frequency shunt loss, though, compared to SLVT devices, this sacrifices the back-gate functionality, resulting in higher RonCoff. This paper proposes and analyses substrate isolation zones implemented in ring-shapes around SLVT-FETs to reduce parasitic shunt admittance while preserving the back-gate. The resulting effective device boasts a low RonCoff metric (thanks to an SLVT-FET core with back-gate) and simultaneously achieves high substrate impedance to the reference ground node (similar performance as BFMOAT-FETs). From such devices, a full SPDT switch was fabricated and characterized up to 130 GHz. Having less than 2.4 dB insertion loss and better than 22 dB isolation from DC to 120 GHz, it outperforms analogous SPDT modules implemented using conventional SLVT or BFMOAT FETs.","PeriodicalId":415294,"journal":{"name":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133342512","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A Dual-Antenna, 263-GHz Energy Harvester in CMOS for Ultra-Miniaturized Platforms with 13.6% RF-to-DC Conversion Efficiency at −8 dBm Input Power 一种用于超小型平台的双天线、263 ghz CMOS能量采集器，在−8 dBm输入功率下，rf - dc转换效率为13.6%
2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2022-06-19 DOI: 10.1109/RFIC54546.2022.9863171
Muhammad Ibrahim Wasiq Khan, Eunseok Lee, N. Monroe, A. Chandrakasan, R. Han
{"title":"A Dual-Antenna, 263-GHz Energy Harvester in CMOS for Ultra-Miniaturized Platforms with 13.6% RF-to-DC Conversion Efficiency at −8 dBm Input Power","authors":"Muhammad Ibrahim Wasiq Khan, Eunseok Lee, N. Monroe, A. Chandrakasan, R. Han","doi":"10.1109/RFIC54546.2022.9863171","DOIUrl":"https://doi.org/10.1109/RFIC54546.2022.9863171","url":null,"abstract":"This paper reports a CMOS energy harvester, which operates at so far the highest reported frequency (263 GHz) in order to realize wireless powering of ultra-miniaturized platforms. To maximize the THz-to-DC conversion efficiency, n, at low available radiation power, the harvester not only utilizes a high-speed 22-nm FinFET transistor but also achieves the optimal operating conditions of the device. In specific, the circuit enables self-gate biasing; and through a dual-antenna topology, it drives the transistor drain and gate terminals with both optimal voltage phase difference and power ratio simultaneously and precisely. With a low input power of −8 dBm, the harvester achieves 13.6% measured conversion efficiency and delivers 22 µW to a 1- kΩ load. Without relying on any external component, the harvester chip occupies an area of 0.61 × 0.93 mm 2.","PeriodicalId":415294,"journal":{"name":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134498221","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
An Eight-core Class-G Switched-capacitor Power Amplifier with Eight Power Backoff Efficiency Peaks 具有8个功率回退效率峰值的8芯g类开关电容功率放大器
2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2022-06-19 DOI: 10.1109/RFIC54546.2022.9863094
Bo Qiao, A. V. Kayyil, D. Allstot
{"title":"An Eight-core Class-G Switched-capacitor Power Amplifier with Eight Power Backoff Efficiency Peaks","authors":"Bo Qiao, A. V. Kayyil, D. Allstot","doi":"10.1109/RFIC54546.2022.9863094","DOIUrl":"https://doi.org/10.1109/RFIC54546.2022.9863094","url":null,"abstract":"An eight-core class-G polar switched-capacitor power amplifier (SCPA) is described that uses an eight-way digitally-scalable transformer (DST) and a new pseudo-differential class-G switch. Employing both supply and load modulation, eight seamless efficiency peaks are realized at 0 dB, 2.5, 6, 8.5, 12, 14.5, 18 and 24 dB power backoff levels by minimizing the dynamic switching loss in the capacitor array. A prototype chip was designed and fabricated in a 65nm CMOS process. It achieves peak output power and drain efficiency (DE) values of 27.2 dBm and 35.5%, respectively, at a carrier frequency of 2.42 GHz. Compared to a normalized class-B power amplifier, the measured DE is increased by $sim 3.3 mathrm{X}$. which corresponds to a 70% power saving. For a single-carrier 64 QAM signal with a 1 MHz bandwidth, the measured average output power and DE are 20.0 dBm and 23.1%, respectively, with an error vector magnitude (EVM) of −28.6 dB.","PeriodicalId":415294,"journal":{"name":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"81 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133382301","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Compact Single Transformer Footprint Hybrid Current-Voltage Digital Doherty Power Amplifier 一种紧凑的单变压器混合电流-电压数字多尔蒂功率放大器
2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2022-06-19 DOI: 10.1109/RFIC54546.2022.9863084
Jeongseok Lee, Doohwan Jung, D. Munzer, Hua Wang
{"title":"A Compact Single Transformer Footprint Hybrid Current-Voltage Digital Doherty Power Amplifier","authors":"Jeongseok Lee, Doohwan Jung, D. Munzer, Hua Wang","doi":"10.1109/RFIC54546.2022.9863084","DOIUrl":"https://doi.org/10.1109/RFIC54546.2022.9863084","url":null,"abstract":"This paper presents a fully integrated single footprint hybrid current-voltage mode digital Doherty power amplifier (PA). A prototype PA is implemented in a 45nm CMOS SOI process. The proposed PA design provides enhanced linearity through adaptive biasing-based AM-PM distortion mitigation of the current mode digital PA and AM-PM cancelation through hybrid current/voltage mode Doherty-based power combining. It achieves 21.7dBm peak output power $(mathrm{P}_{text{sat}})$ at 1.2GHz and 37.6% drain efficiency (DE) at 1.4GHz. The proposed digital Doherty PA demonstrates $1.2times/1.22times text{PBO}$ efficiency enhancement, compared to the ideal class-B at 3/6 dB PBO at 1.2GHz. The measured error vector magnitude (EVM) of 64-QAM/20MHz is −23dB with 22.8% average DE without DPD. This is the first demonstration of hybrid current-voltage mode Doherty power combining on a single footprint transformer over a broad bandwidth (BW)","PeriodicalId":415294,"journal":{"name":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"9 11","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114007057","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A 17 Gb/s 10.7 pJ/b 4FSK Transceiver System for Point to Point Communication in 65 nm CMOS 基于65nm CMOS的点对点通信的17gb /s 10.7 pJ/b 4FSK收发器系统
2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2022-06-19 DOI: 10.1109/RFIC54546.2022.9863100
Hamidreza Afzal, Cheng Li, O. Momeni
{"title":"A 17 Gb/s 10.7 pJ/b 4FSK Transceiver System for Point to Point Communication in 65 nm CMOS","authors":"Hamidreza Afzal, Cheng Li, O. Momeni","doi":"10.1109/RFIC54546.2022.9863100","DOIUrl":"https://doi.org/10.1109/RFIC54546.2022.9863100","url":null,"abstract":"This paper presents a novel 145–185 GHz transceiver (TRX) with 4 frequency-shift keying (4FSK) modulation. The proposed non-coherent 4FSK design removes the need for separate modulator and demodulator blocks reducing the power consumption and complexity. The proposed TX generates four different RF frequencies based on the two parallel streams of binary input data, and the RX employs a slot power divider to divide the 4FSK RF signal into two paths, where the 4FSK RF signal is demodulated and data is recovered by enveloped detectors and digital buffers. Both the transmitter and receiver are fabricated in a 65 nm CMOS technology with a total core area of $0.6 mm^{2}$. The TRX architecture achieves 17 Gb/s over 18 cm link distance while consuming only 182 mW power.","PeriodicalId":415294,"journal":{"name":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"82 3","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114114762","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
A Small-Area, Low-Power 76-81GHz HBT-based Differential Power Detector for Built-In Self-Test in Automotive Radar Applications 一种用于汽车雷达内置自检的小面积、低功耗76-81GHz基于hbt的差分功率检测器
2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2022-06-19 DOI: 10.1109/RFIC54546.2022.9863198
Y. Wenger, H. Ng, F. Korndörfer, B. Meinerzhagen, V. Issakov
{"title":"A Small-Area, Low-Power 76-81GHz HBT-based Differential Power Detector for Built-In Self-Test in Automotive Radar Applications","authors":"Y. Wenger, H. Ng, F. Korndörfer, B. Meinerzhagen, V. Issakov","doi":"10.1109/RFIC54546.2022.9863198","DOIUrl":"https://doi.org/10.1109/RFIC54546.2022.9863198","url":null,"abstract":"This paper presents a differential power detector for automotive radar applications based on the nonlinearity of a SiGe HBT. Compared to other commonly used detectors, this architecture achieves true measurement of the differential-mode power by applying the differential input signal over the base-emitter diodes of complementary bipolar transistors. A competitive dynamic range of 30 dB is reached. Because of its low power consumption of only 0.5 mW and small active area of 0.005 mm2, the detector is well-suited for built-in self-test applications. To the authors' best knowledge this is the only true differential power detector in the 76 GHz to 81 GHz automotive radar band. Measurements over the complete automotive temperature range and the detector's sensitivity to process variation are reported.","PeriodicalId":415294,"journal":{"name":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114578625","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
An All-Silicon E-Band Backhaul-on-Glass Frequency Division Duplex Module with >24dBm PSAT & 8dB NF 全硅e波段玻璃上回传分频双工模块，PSAT >24dBm, NF > 8dB
2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2022-06-19 DOI: 10.1109/RFIC54546.2022.9863150
S. Shahramian, M. Holyoak, M. Zierdt, M. Sayginer, J. Weiner, Amit Singh, Y. Baeyens
{"title":"An All-Silicon E-Band Backhaul-on-Glass Frequency Division Duplex Module with >24dBm PSAT & 8dB NF","authors":"S. Shahramian, M. Holyoak, M. Zierdt, M. Sayginer, J. Weiner, Amit Singh, Y. Baeyens","doi":"10.1109/RFIC54546.2022.9863150","DOIUrl":"https://doi.org/10.1109/RFIC54546.2022.9863150","url":null,"abstract":"E-Band Backhaul-on-Glass Frequency Division Duplex (FDD) modules combining SiGe BiCMOS transceivers (TRX) and power amplifiers (PA) with glass-integrated RF splitting/combining and diplexing are presented. The TRX ICs operate at 71–76 GHz (Low-Band) and 81–86 GHz (High-Band). The TX PSAT and RX NF of the FDD modules on average measure 24dBm and 8dB across the two operating bands. Each FDD module supports TX constellations up to 1024-QAM (<2% EVM at 15dBm output) and data rates up to 24Gb/s (64-QAM at 20dBm output). Complete FDD measurements mimicking distances from 2km to 20km demonstrate bidirectional constellations up to 256-QAM and data-rates up to 24Gb/s.","PeriodicalId":415294,"journal":{"name":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"57 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114608068","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
RFIC 2022 Affiliation Index RFIC 2022关联指数
2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2022-06-19 DOI: 10.1109/rfic54546.2022.9863203
{"title":"RFIC 2022 Affiliation Index","authors":"","doi":"10.1109/rfic54546.2022.9863203","DOIUrl":"https://doi.org/10.1109/rfic54546.2022.9863203","url":null,"abstract":"","PeriodicalId":415294,"journal":{"name":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122070227","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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