{"title":"基于65nm CMOS的点对点通信的17gb /s 10.7 pJ/b 4FSK收发器系统","authors":"Hamidreza Afzal, Cheng Li, O. Momeni","doi":"10.1109/RFIC54546.2022.9863100","DOIUrl":null,"url":null,"abstract":"This paper presents a novel 145–185 GHz transceiver (TRX) with 4 frequency-shift keying (4FSK) modulation. The proposed non-coherent 4FSK design removes the need for separate modulator and demodulator blocks reducing the power consumption and complexity. The proposed TX generates four different RF frequencies based on the two parallel streams of binary input data, and the RX employs a slot power divider to divide the 4FSK RF signal into two paths, where the 4FSK RF signal is demodulated and data is recovered by enveloped detectors and digital buffers. Both the transmitter and receiver are fabricated in a 65 nm CMOS technology with a total core area of $0.6\\ mm^{2}$. The TRX architecture achieves 17 Gb/s over 18 cm link distance while consuming only 182 mW power.","PeriodicalId":415294,"journal":{"name":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"82 3","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"A 17 Gb/s 10.7 pJ/b 4FSK Transceiver System for Point to Point Communication in 65 nm CMOS\",\"authors\":\"Hamidreza Afzal, Cheng Li, O. Momeni\",\"doi\":\"10.1109/RFIC54546.2022.9863100\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a novel 145–185 GHz transceiver (TRX) with 4 frequency-shift keying (4FSK) modulation. The proposed non-coherent 4FSK design removes the need for separate modulator and demodulator blocks reducing the power consumption and complexity. The proposed TX generates four different RF frequencies based on the two parallel streams of binary input data, and the RX employs a slot power divider to divide the 4FSK RF signal into two paths, where the 4FSK RF signal is demodulated and data is recovered by enveloped detectors and digital buffers. Both the transmitter and receiver are fabricated in a 65 nm CMOS technology with a total core area of $0.6\\\\ mm^{2}$. The TRX architecture achieves 17 Gb/s over 18 cm link distance while consuming only 182 mW power.\",\"PeriodicalId\":415294,\"journal\":{\"name\":\"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)\",\"volume\":\"82 3\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-06-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RFIC54546.2022.9863100\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC54546.2022.9863100","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 17 Gb/s 10.7 pJ/b 4FSK Transceiver System for Point to Point Communication in 65 nm CMOS
This paper presents a novel 145–185 GHz transceiver (TRX) with 4 frequency-shift keying (4FSK) modulation. The proposed non-coherent 4FSK design removes the need for separate modulator and demodulator blocks reducing the power consumption and complexity. The proposed TX generates four different RF frequencies based on the two parallel streams of binary input data, and the RX employs a slot power divider to divide the 4FSK RF signal into two paths, where the 4FSK RF signal is demodulated and data is recovered by enveloped detectors and digital buffers. Both the transmitter and receiver are fabricated in a 65 nm CMOS technology with a total core area of $0.6\ mm^{2}$. The TRX architecture achieves 17 Gb/s over 18 cm link distance while consuming only 182 mW power.