Tianyang Wang, T. Hemperek, H. Krüger, K. Moustakas, P. Rymaszewski, M. Vogt
{"title":"A high speed transmitter circuit for the ATLAS/CMS HL-LHC pixel readout chip","authors":"Tianyang Wang, T. Hemperek, H. Krüger, K. Moustakas, P. Rymaszewski, M. Vogt","doi":"10.22323/1.343.0098","DOIUrl":"https://doi.org/10.22323/1.343.0098","url":null,"abstract":"In order to satisfy the high output bandwidth requirement imposed by the High Luminosity LHC, a high speed transmitter circuit was designed and integrated into the RD53A demonstrator chip for the phase 2 ATLAS/CMS pixel detector upgrade. A clock and data recovery circuit recovers clock from the 160 Mb/s data stream received by the chip, and provides the high speed clock to the serializer, where the 1.28 Gb/s output stream is formed from the 20-bit data words provided by the data encoding logic. The output stage employs a three-tap current-mode logic cable driver with adjustable tap weights for optimal pre-emphasis in order to compensate for the high frequency loss of the foreseen low mass cable. Each RD53A chip includes four output data lines, offering in total 5.12 Gb/s output bandwidth. The RD53A chip has been fabricated in a 65 nm CMOS technology. The output jitter was measured to be ∼ 20 ps (1 σ ) with pseudo random data at the nominal speed of 1.28 Gb/s.","PeriodicalId":400748,"journal":{"name":"Proceedings of Topical Workshop on Electronics for Particle Physics — PoS(TWEPP2018)","volume":"108 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124151343","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
C. Gao, M. An, Guangming Huang, Xing Huang, Y. Mei, Quan Sun, Xiangming Sun, L. Xiao, P. Yang
{"title":"A Low-Noise Charge-Sensitive Amplifier for Gainless Charge Readout in High-Pressure Gas TPC","authors":"C. Gao, M. An, Guangming Huang, Xing Huang, Y. Mei, Quan Sun, Xiangming Sun, L. Xiao, P. Yang","doi":"10.22323/1.343.0083","DOIUrl":"https://doi.org/10.22323/1.343.0083","url":null,"abstract":"TWEPP 2018Topical Workshop on Electronics for Particle Physics. https://indico.cern.ch/event/697988/contributions/3056035/ We present a low-noise Charge-Sensitive Amplifier (CSA) manufactured in a standard 0.35 μm CMOS process. The CSA is part of an integrated sensor named Topmetal-S, with an array of which, forms a charge readout plane in a high-pressure gaseous Time Projection Chamber (TPC) for 0νββ search. A single-ended folded cascode amplifier with a 73 dB open-loop gain and 340 MHz gain-bandwidth product forms the main amplification stage in this CSA. Measurements show that the conversion gain of the CSA with a 3 fF feedback capacitor is 168 mV/fC. The equivalent noise charge of the CSA after a trapezoidal pulse shaper is 28.7erms with a 5 pF detector capacitance. Introduction Topmetal sensor for a next-generation high-pressure gaseous (TPC) to search for neutrinoless double-beta decay (0υββ): Ø Topmetal sensor advantage: directly collecting ionization charges without gas-electron multiplication Ø Energy resolution: < 1% FWHM Ø Charge Collection Electrode : 1 mm diameter Ø Pitch: 5 mm Ø 105 sensors for a large plane","PeriodicalId":400748,"journal":{"name":"Proceedings of Topical Workshop on Electronics for Particle Physics — PoS(TWEPP2018)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127367486","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Xiushan Chen, X. Lin-Ma, C. Combaret, L. Mirabito, G. Lu, I. Laktineh
{"title":"Improved Tapped-Delay-Line Time-to-Digital Converter with Time-over-Threshold measurement for a new generation of Resistive Plate Chamber detectors","authors":"Xiushan Chen, X. Lin-Ma, C. Combaret, L. Mirabito, G. Lu, I. Laktineh","doi":"10.22323/1.343.0141","DOIUrl":"https://doi.org/10.22323/1.343.0141","url":null,"abstract":"To exploit the timing performance of a new generation of Resistive Plate Chamber (RPC) detectors, we propose a TDC using a signal-reshaping approach to minimize bubble length (bits of uncertain data) and thus to improve the time measurement resolution. It includes two encoders to detect independently the signal’s leading/trailing edges in a 64-bit window, instead of taking the whole delay line’s length over hundreds of bits. This saves implementation resources. Our proposed TDC has been implemented on a FPGA (Cyclone V GT device, 5CGT–D9-C7N) in 65 channels in parallel. Test results give evaluated precision of measurements in RMS values: 10.0ps for leading edge, 14.1ps for trailing edge and 18.1ps for ToT respectively. The TDC can operate at a minimum pulse width of 2ns for its input pulsed signal.","PeriodicalId":400748,"journal":{"name":"Proceedings of Topical Workshop on Electronics for Particle Physics — PoS(TWEPP2018)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128371984","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
M. Sonzogni, F. Canio, L. Gaioni, M. Manghisoni, V. Re, G. Traversi, L. Ratti
{"title":"Algorithms for Threshold Dispersion Minimization of the CHIPIX65 Asynchronous Front-End","authors":"M. Sonzogni, F. Canio, L. Gaioni, M. Manghisoni, V. Re, G. Traversi, L. Ratti","doi":"10.22323/1.343.0076","DOIUrl":"https://doi.org/10.22323/1.343.0076","url":null,"abstract":"This work discusses four different algorithms for the minimization of threshold dispersion in multichannel readout circuits for pixel detectors. These algorithms, which are based on different methods (e.g. charge scans, threshold scans, etc) and differs in terms of performance and computation time, have been tested on the asynchronous front-end integrated in the CHIPIX65_FE0, a readout ASIC prototype designed in a 65 nm CMOS technology.","PeriodicalId":400748,"journal":{"name":"Proceedings of Topical Workshop on Electronics for Particle Physics — PoS(TWEPP2018)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131010691","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Status of the Readout Electronics for the Triple-GEM Detectors of the CMS GE1/1 System and Performance of the Slice Test in the 2017-18 LHC Run","authors":"E. Starling","doi":"10.22323/1.343.0132","DOIUrl":"https://doi.org/10.22323/1.343.0132","url":null,"abstract":"In this contribution, we will present the status of the readout electronics system for the triple-GEM detectors of the GE1/1 system, an upgrade which is planned for installation into the CMS experiment during the next LHC long shutdown (LS2) in 2019-2020. We will also report on the performance of the ten slice test detectors which have been present in the CMS muon endcap since the 2017 LHC run, which represent the first time that such large triple-GEM detectors have been operated within the LHC environment, and on the first results from the v3 slice test detectors that were added to the slice test in March 2018. \u0000 \u0000Ten slice test detectors were installed into the CMS muon endcap in January 2017. Data was recorded throughout the 2017-2018 run, using both cosmic ray muons and LHC collisions. Using the lessons learnt from this slice test allowed for the development of the final GE1/1 v3 electronics which will be used on the production chambers to be installed during LS2. These new detectors will be read out on the front-end by 24 VFAT3 chips, which runs at 320 MHz, four times higher than the frequency of the VFAT2 chip, as well as the v3 optohybrid (OH) board. The VFAT3 chips communicate with the OH through a 1m-long PCB, called the GEM electronics board (GEB), which has been re-designed to accommodate the faster VFAT3 digital signals. The on-detector electronics are powered via ten FEAST DC-DC converters. Optical communication to the back-end, which includes a microTCA crate containing CTP7 and AMC13 boards, is based on the CERN Versatile link, including GBT and SCA chips as well as VTRx and VTTx optical modules. Production and qualification of the v3 GE1/1 detectors is currently ongoing.","PeriodicalId":400748,"journal":{"name":"Proceedings of Topical Workshop on Electronics for Particle Physics — PoS(TWEPP2018)","volume":"178 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121260561","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"FELIX: the New Detector Readout System for the ATLAS Experiment","authors":"G. Unel","doi":"10.22323/1.343.0140","DOIUrl":"https://doi.org/10.22323/1.343.0140","url":null,"abstract":"Starting during the upcoming major LHC shutdown (2019-2021), the ATLAS experiment at CERN will move to the Front-End Link eXchange (FELIX) system as the interface between the data acquisition system and the trigger and detector front-end electronics. FELIX will function as a router between custom serial links and a commodity switch network, which will use industry standard technologies to communicate with data collection and processing components. This paper describes the FELIX system design as well as the results of the ongoing development program.","PeriodicalId":400748,"journal":{"name":"Proceedings of Topical Workshop on Electronics for Particle Physics — PoS(TWEPP2018)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121955276","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"The Proton Timing System of the TOTEM experiment at LHC","authors":"Edoardo Bossini","doi":"10.22323/1.343.0137","DOIUrl":"https://doi.org/10.22323/1.343.0137","url":null,"abstract":"The TOTEM experiment has developed a new timing detector to be used during a special LHC run. The new proton timing detector, based on Ultrafast Silicon Detectors, is installed in the TOTEM Roman Pots, at 220 meters from the interaction point 5 at LHC. The sensors are readout through a fast sampler chip: the SAMPIC. With a sampler, it is possible to record the detector waveforms so that sophisticated offline algorithms can be used to achieve the best timing performance. A new board has been designed to integrate the chip in the TOTEM and CMS DAQ and control systems. The core component of the board is a radiation hard FPGA, with a dedicated firmware designed to configure the SAMPIC and assemble the DAQ data frame event. The system was successfully operated during the run in July 2018. The detector will be described and the preliminary results discussed.","PeriodicalId":400748,"journal":{"name":"Proceedings of Topical Workshop on Electronics for Particle Physics — PoS(TWEPP2018)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128463701","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Investigation of Single Event Latch-up effects in the ALICE SAMPA ASIC","authors":"S. Mahmood, K. Roeed","doi":"10.22323/1.343.0023","DOIUrl":"https://doi.org/10.22323/1.343.0023","url":null,"abstract":"During RUN 3 and RUN 4 at the Large Hadron Collider (LHC), the SAMPA chip will be used in the upgraded front end electronics of the ALICE (A Large Ion Collider Experiment) Time Projection Chamber (TPC) and Muon Chambers (MCH). Previously, it was reported that the SAMPA V2 prototypes were susceptible to the high energy proton induced Single Event Latch-up (SEL) events. Further irradiation campaigns were required to find the source of SEL events in SAMPA V2 prototypes, and to verify that the SEL sensitivity of final versions (V3 and V4) of the SAMPA chip was reduced or even completely removed. The irradiation campaigns were performed using the Heavy-Ion Facility (HIF) at UCL (Universitè Catholique de Louvain) in Belgium and the Single-Photon laser facility at IES (Institute of Electronics and Systems), Montpellier-France.","PeriodicalId":400748,"journal":{"name":"Proceedings of Topical Workshop on Electronics for Particle Physics — PoS(TWEPP2018)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128492835","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Wojciech Zabolotny, A. Byszuk, D. Emschermann, M. Gumiński, G. Kasprowicz, J. Lehnert, P. Loizeau, W. Mueller, K. Poźniak, Ryszard S. Romaniuk
{"title":"GBT oriented firmware for Data Processing Boards for CBM","authors":"Wojciech Zabolotny, A. Byszuk, D. Emschermann, M. Gumiński, G. Kasprowicz, J. Lehnert, P. Loizeau, W. Mueller, K. Poźniak, Ryszard S. Romaniuk","doi":"10.22323/1.343.0067","DOIUrl":"https://doi.org/10.22323/1.343.0067","url":null,"abstract":"The Data Processing Boards are the important component of the development version of the CBM readout system. Even though in the final version they will be replaced with the new Common Readout Interface PCIe boards, they are still used for development and testing of new firmware features and for operation during the beam tests. The paper describes the current state of the DPB firmware development. The special emphasis is put on the functionalities related to support for various configurations of the GBTX-connected front-end electronics.","PeriodicalId":400748,"journal":{"name":"Proceedings of Topical Workshop on Electronics for Particle Physics — PoS(TWEPP2018)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124343200","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A bipolar shaping amplifier for low background alpha/beta counters with silicon detectors.","authors":"S. Thys, O. Evrard, S. Put, P. Leroux","doi":"10.22323/1.343.0021","DOIUrl":"https://doi.org/10.22323/1.343.0021","url":null,"abstract":"","PeriodicalId":400748,"journal":{"name":"Proceedings of Topical Workshop on Electronics for Particle Physics — PoS(TWEPP2018)","volume":"50 7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129809777","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}