2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS)最新文献_第3页

On enhancing the debug architecture of a system-on-chip (SoC) to detect software attacks 改进片上系统(SoC)的调试架构以检测软件攻击

2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS) Pub Date : 2015-10-12 DOI: 10.1109/DFT.2015.7315131

J. Backer, D. Hély, R. Karri

引用次数: 9

Approximate compressors for error-resilient multiplier design 近似压缩机的误差弹性乘法器设计

2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS) Pub Date : 2015-10-01 DOI: 10.1109/DFT.2015.7315159

Zhixi Yang, Jie Han, F. Lombardi

引用次数: 65

A method to protect Bloom filters from soft errors 保护布隆过滤器免受软错误的方法

2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS) Pub Date : 2015-10-01 DOI: 10.1109/DFT.2015.7315140

P. Reviriego, S. Pontarelli, J. A. Maestro, M. Ottavi

{"title":"A method to protect Bloom filters from soft errors","authors":"P. Reviriego, S. Pontarelli, J. A. Maestro, M. Ottavi","doi":"10.1109/DFT.2015.7315140","DOIUrl":"https://doi.org/10.1109/DFT.2015.7315140","url":null,"abstract":"Bloom filters are used in many computing and networking applications where they provide a simple method to test if an element is present in a set. In some of those systems, reliability is a major concern and therefore the Bloom filters should be protected to ensure that errors do not affect the system behavior. One of the most common type of errors in electronic implementations of Bloom filters are radiation induced soft errors. Soft errors can corrupt the contents of a Bloom filter causing false positives and false negatives. Error Correction Codes (ECCs) can be used to protect the Bloom filter so that for example single bit errors are detected and corrected. However, the use of ECCs impacts the implementation area, power and delay. In this paper, a method to efficiently protect the contents of a Bloom filter is presented. The scheme exploits the different effects at the system level of false positives and false negatives to achieve effective error protection at lower cost than that of a traditional ECC. To illustrate the benefits of the proposed method, a case study is presented where the proposed implementation is compared with the use of a traditional Hamming ECC.","PeriodicalId":383972,"journal":{"name":"2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS)","volume":"152 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123047048","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 6

Impact of test compression on power supply noise control 试验压缩对电源噪声控制的影响

2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS) Pub Date : 2015-10-01 DOI: 10.1109/DFT.2015.7315155

Tengteng Zhang, D. Walker

引用次数: 0

RotR: Rotational redundant task mapping for fail-operational MPSoCs RotR:用于故障mpsoc的旋转冗余任务映射

2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS) Pub Date : 2015-10-01 DOI: 10.1109/DFT.2015.7315130

Badrun Nahar, B. Meyer

引用次数: 4

Improving X-tolerant combinational output compaction via input rotation 通过输入旋转改善x容忍度组合输出压实

2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS) Pub Date : 2015-10-01 DOI: 10.1109/DFT.2015.7315156

A. A. Bawa, N. Touba

{"title":"Improving X-tolerant combinational output compaction via input rotation","authors":"A. A. Bawa, N. Touba","doi":"10.1109/DFT.2015.7315156","DOIUrl":"https://doi.org/10.1109/DFT.2015.7315156","url":null,"abstract":"Combinational linear compactors can be used to compact the output response for a large number of scan chains into a smaller number of outputs. While some compactor designs can guarantee observation of all scan chains in the presence of a small number of X's, this may not be sufficient for designs with higher X densities. This paper describes an approach for using a combinational rotator between the scan chains and compactor to allow detection of faults even in the presence of high X densities. It is shown that the number of control inputs to the rotator is comparable to the number of control inputs required by conventional X masking approaches, but by not masking, the proposed approach is able to provide higher observability which translates to fewer test patterns, better compression, and better coverage of non-modeled faults. Moreover, the control data for the rotator has many more don't cares than the control data for X masking thereby making it easier and more efficient to compress with a linear decompressor. A heuristic procedure for ordering the inputs to a combinational compactor to increase the probability of observation for a given maximum shift distance is also presented. Experimental results indicate that high observability can be achieved using the proposed method with a relatively small number of control inputs.","PeriodicalId":383972,"journal":{"name":"2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS)","volume":"194 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114201556","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Using value similarity of registers for soft error mitigation 使用寄存器的值相似度来减轻软错误

2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS) Pub Date : 2015-10-01 DOI: 10.1109/DFT.2015.7315142

A. Eker, O. Ergin

{"title":"Using value similarity of registers for soft error mitigation","authors":"A. Eker, O. Ergin","doi":"10.1109/DFT.2015.7315142","DOIUrl":"https://doi.org/10.1109/DFT.2015.7315142","url":null,"abstract":"Soft errors caused by the cosmic particles or the radiation from the packaging material of the integrated circuits are an increasingly important design problem. With the shrinking feature sizes, the datapath components of the out-of-order superscalar pipeline are becoming more prone to soft errors. Being the major data holding component in contemporary microprocessors, the register file has been an important part of the processor on which researchers offered many different schemes to protect against soft errors. We start with the observation that many of the stored values inside the register file have very small Hamming distances when compared to each other. After showing this analysis results we propose a soft error correction scheme that makes use of the presence of multiple register values that have zero Hamming distance from each other. We use this already available redundancy along with parity protection to achieve error correction for many of the stored values. Our results show that, by employing schemes that make use of the already available copies of the values inside the register file, it is possible to detect and correct 39.0% of the errors with an additional power consumption of 18.9%.","PeriodicalId":383972,"journal":{"name":"2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS)","volume":"109 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132426787","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Asymmetric ECC organization in 3D-memory via spare column utilization 通过空闲列的利用，3d内存中的非对称ECC组织

2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS) Pub Date : 2015-10-01 DOI: 10.1109/DFT.2015.7315128

Hyunseung Han, Joon-Sung Yang

引用次数: 3

Dependable real-time task execution scheme for a many-core platform 面向多核平台的可靠实时任务执行方案

2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS) Pub Date : 2015-10-01 DOI: 10.1109/DFT.2015.7315162

T. Yoneda, Masashi Imai, H. Saito, Kenji Kise

引用次数: 3

A configurable board-level adaptive incremental diagnosis technique based on decision trees 基于决策树的可配置板级自适应增量诊断技术

2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS) Pub Date : 2015-10-01 DOI: 10.1109/DFT.2015.7315167

C. Bolchini, Luca Cassano

引用次数: 1