2016 IEEE-NPSS Real Time Conference (RT)最新文献_第9页

The study of strip readout prototype for ATLAS Phase-I Muon trigger upgrade ATLAS第一期介子触发器升级的条带读数原型研究

2016 IEEE-NPSS Real Time Conference (RT) Pub Date : 2016-06-06 DOI: 10.1109/RTC.2016.7543134

Feng Li, K. Hu, Xu Wang, Houbing Lu, Tianru Geng, Xinxin Wang, Hang Yang, Shengquan Liu, L. Han, G. Jin

引用次数: 2

FPGA implementation of Toeplitz hashing extractor for real time post-processing of raw random numbers 用于原始随机数实时后处理的Toeplitz哈希提取器的FPGA实现

2016 IEEE-NPSS Real Time Conference (RT) Pub Date : 2016-06-06 DOI: 10.1109/RTC.2016.7543094

Xiaoguang Zhang, You-Qi Nie, H. Liang, Jun Zhang

{"title":"FPGA implementation of Toeplitz hashing extractor for real time post-processing of raw random numbers","authors":"Xiaoguang Zhang, You-Qi Nie, H. Liang, Jun Zhang","doi":"10.1109/RTC.2016.7543094","DOIUrl":"https://doi.org/10.1109/RTC.2016.7543094","url":null,"abstract":"Random numbers are widely used in many fields. However, most existing random number generators cannot directly generate ideal random bits without post-processing. With the development of generation techniques, the generation rate of raw random data has reached Gbps magnitude and the speed of existing post-processing cannot satisfy the growth of demand. To solve this issue, we propose a concurrent pipeline algorithm based on Toeplitz matrix hashing and implement it in a resource limited field-programmable gate array (FPGA). By taking advantage of the concurrent computation features of FPGA instead of common computer serial computation, the post-processing speed is improved by three orders of magnitudes to above 3.36 Gbps, which is suited for Gbps real time post-processing of raw random numbers. After post-processing, the final extracted random bits can well pass the standard randomness tests. To implement the scheme, a printed circuit board (PCB) is designed for raw data acquisition, real time post-processing and final extracted random data transmission. On the PCB, the random signal is sampled and digitalized as raw random data and then the data are fed into a FPGA for real time post-processing. At the same time, three different transmission interfaces including a small form-factor pluggable (SFP) fiber transceiver, a universal serial bus (USB) 2.0 port and a Gigabit Ethernet port are designed for different scenarios. An optional DDR3 memory module is also provided for testing purpose.","PeriodicalId":383702,"journal":{"name":"2016 IEEE-NPSS Real Time Conference (RT)","volume":"59 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127038135","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 11

A small data acquisition system for the KOALA experiment in Jülich 一个小型数据采集系统的考拉实验在j<s:1>利希

2016 IEEE-NPSS Real Time Conference (RT) Pub Date : 2016-06-06 DOI: 10.1109/RTC.2016.7543118

P. Wustner, D. Grzonka, Q. Hu, J. Ritman, H. Xu, S. van Waasen

引用次数: 1

Feasibility of software-based real-time calibration of multi-gigabit PET data 基于软件的多千兆PET数据实时标定的可行性

2016 IEEE-NPSS Real Time Conference (RT) Pub Date : 2016-06-06 DOI: 10.1109/RTC.2016.7543172

D. Freese, D. Hsu, D. Innes, C. Levin

{"title":"Feasibility of software-based real-time calibration of multi-gigabit PET data","authors":"D. Freese, D. Hsu, D. Innes, C. Levin","doi":"10.1109/RTC.2016.7543172","DOIUrl":"https://doi.org/10.1109/RTC.2016.7543172","url":null,"abstract":"Positron Emission Tomography (PET) imaging of the breast has the potential to play a role in the detection, diagnosis, staging, guiding surgical resection, and monitoring of therapy for breast cancer. Of these potential roles, producing images at near or real-time is especially important to guide surgical resection and biopsy. This task becomes more difficult in systems with large numbers of detectors and channels. We are constructing a two-panel clinical PET system dedicated to imaging the breast that has 294,912 LYSO crystals read out by 4608 Position-Sensitive Avalanche Photodiodes (PSAPD). The system will read out data using UDP over six gigabit ethernet ports with a maximum predicted data rate of 456MBps for clinical settings. We discuss software considerations for receiving data since UDP does not guarantee transmission. We implement a dual-threaded design for receiving then processing raw data from the system. This model shows 0.037 ± 0.004 % data loss at 240MBps. This rate is the maximum for the current two gigabit ethernet cable setup. We extend and test data loss of the dual-threaded model by adding additional processing of raw data in the second thread. The processing of raw data produces calibrated data with an accurate timestamp, energy, and position in real-time. We show negligible (<; 0.0001 %) loss at or below 60MBps. There, however, is a steady increase in loss with increasing data rate up to 45.9 ± 0.6 % loss at 240MBps. We conclude, that barring upgrades to our current data acquisition computer, we need to produce calibrated data from saved raw data after the scan, which can be done quickly without the constraint of minimizing data loss.","PeriodicalId":383702,"journal":{"name":"2016 IEEE-NPSS Real Time Conference (RT)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121970746","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A new preprocessing and control board for the phase 2 electronics of AGATA experiment 一种用于AGATA实验第二阶段电子学的新型预处理和控制板

2016 IEEE-NPSS Real Time Conference (RT) Pub Date : 2016-06-06 DOI: 10.1109/RTC.2016.7543161

J. Collado, J. Blasco, N. Dosme, V. González, X. Grave, N. Karkour, X. Lafay, E. Legay, D. Linget, E. Sanchis

{"title":"A new preprocessing and control board for the phase 2 electronics of AGATA experiment","authors":"J. Collado, J. Blasco, N. Dosme, V. González, X. Grave, N. Karkour, X. Lafay, E. Legay, D. Linget, E. Sanchis","doi":"10.1109/RTC.2016.7543161","DOIUrl":"https://doi.org/10.1109/RTC.2016.7543161","url":null,"abstract":"The electronics of AGATA HPGe segmented gamma ray detector faces a new challenge in the search of a bigger integration and cost reduction for the phase 2 of the experiment going beyond 45 crystals. This opportunity can be used to introduce a new architecture based on commercial standards while keeping backward compatibility with current electronics. In this sense, new FPGA devices and fast Ethernet links can be used to ease the preprocessing and control task and allowing for processor farms to distribute the processing load. At the same time, modularity should be a key feature of the design in the aim to make it upgradable in time and technology. This paper presents the design of a new preprocessing and control board that could fulfill with the experiment requirements having in mind that it should not be only a new system but also should serve as replacement of the current electronics. The design is intended to process the data coming from 3 crystals (114 channels) in the same board, with a total aggregate bandwidth of 216 Gpbs using 2 Gbps input optical fiber links in SNAP12 format and with a data readout done through Ethernet fiber optics. It is expected that, with this new system, the level of integration will raise up to 3 times while cost will scale down a 30% with respect to the current electronics.","PeriodicalId":383702,"journal":{"name":"2016 IEEE-NPSS Real Time Conference (RT)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123745439","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

FPGA-based image analyzer for calibration of stereo vision rigs 基于fpga的立体视觉标定图像分析仪

2016 IEEE-NPSS Real Time Conference (RT) Pub Date : 2016-06-06 DOI: 10.1109/RTC.2016.7543175

A. Mielczarek, D. Makowski, P. Perek, A. Napieralski, Przemyslaw Sztoch

引用次数: 1

Design and implementation of EAST data visualization in VEAST system VEAST系统中EAST数据可视化的设计与实现

2016 IEEE-NPSS Real Time Conference (RT) Pub Date : 2016-06-06 DOI: 10.1109/RTC.2016.7543151

D. Li, B. Xiao, J. Xia, Y. Huang, S. L. Chen, K. Wang

{"title":"Design and implementation of EAST data visualization in VEAST system","authors":"D. Li, B. Xiao, J. Xia, Y. Huang, S. L. Chen, K. Wang","doi":"10.1109/RTC.2016.7543151","DOIUrl":"https://doi.org/10.1109/RTC.2016.7543151","url":null,"abstract":"The Experimental Advanced Superconductive Tokamak (EAST) Device began operation in 2006. EAST's inner structure is very complicated and contains a lot of subsystems which have a variety of different functions. In order to facilitate the understanding of the device and experimental information and promote the development of the experiment, the virtual EAST system has established an EAST virtual reality scene in which the user can roam and access to information by interacting with the system. However, experiment-related parameter information, diagnostic information and magnetic measurement information are displayed in the form of charts, figures, tables and two dimensional graphics. In order to express the experimental results directly, three-dimensional data visualization results are created using computer graphics technology. Data visualization is the process of visualizing data based on the characteristics of the data, the selection of the appropriate data structure and the proper sequence of visual pipeline. We use the visualization toolkit (VTK) to realize the data visualization in VEAST system and give the detailed steps of data visualization of plasma column, electron cyclotron emission diagnostic and plasma magnetic field. Besides, the general format is defined for the users to organize their data so that they can visualize their data in our system.","PeriodicalId":383702,"journal":{"name":"2016 IEEE-NPSS Real Time Conference (RT)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132872649","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Framework upgrade of the detector control system for JUNO 朱诺探测器控制系统的框架升级

2016 IEEE-NPSS Real Time Conference (RT) Pub Date : 2016-06-06 DOI: 10.1109/RTC.2016.7543148

Y. Mei, Z. Han

{"title":"Framework upgrade of the detector control system for JUNO","authors":"Y. Mei, Z. Han","doi":"10.1109/RTC.2016.7543148","DOIUrl":"https://doi.org/10.1109/RTC.2016.7543148","url":null,"abstract":"The Jiangmen Underground Neutrino Observatory (JUNO) is the second phase of the reactor neutrino experiment. The detector of the experiment was designed as a 20k ton LS with a Inner diameter of 34.5 meters casting material acrylic ball shape. Due to the gigantic shape of the detector there are approximate 10k monitoring point of temperature and humidity. There are about 20k channels of high voltage of array PMT, electric crates as well as the power monitoring points. Since most of the first phase software of the DCS was developed on the framework based on windows, which is limited by operation system upgrade and commercial software, the framework migration and upgrade are necessary for DCS of JUNO. The paper will introduce the upgrade framework of the DCS based on EPICS (Experimental Physics and Industrial Control System) running Linux OS. The implementation of the IOCs of the high-voltage crate and modules, stream device drivers, and the embedded temperature firmware will be presented. The software realization and the remote control method will be presented as well as the development of the GUIs by CSS (Control System Studio). The upgrade framework can be widely used in the project with the similar hardware and software interfaces.","PeriodicalId":383702,"journal":{"name":"2016 IEEE-NPSS Real Time Conference (RT)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134645114","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Upgrade of End-cap TOF trigger system on BESIII BESIII上端帽TOF触发系统的升级

2016 IEEE-NPSS Real Time Conference (RT) Pub Date : 2016-06-06 DOI: 10.1109/RTC.2016.7543173

J. Zhao, Z. Liu, W. Gong, F. Deng, L. Cheng, Z. Wu, K. Wang, J. Huang

引用次数: 0

An ultra-fast linear array detector for MHz line repetition rate spectroscopy 一种用于MHz线重复率光谱的超快速线性阵列探测器

2016 IEEE-NPSS Real Time Conference (RT) Pub Date : 2016-06-01 DOI: 10.1109/RTC.2016.7543157

L. Rota, M. Balzer, M. Caselle, S. Kudella, M. Weber, A. Mozzanica, N. Hiller, M. Nasse, G. Niehues, P. Schönfeldt, C. Gerth, Bernd Steffen, S. Walther, D. Makowski, A. Mielczarek

引用次数: 4