A. Mielczarek, D. Makowski, P. Perek, A. Napieralski, Przemyslaw Sztoch
{"title":"FPGA-based image analyzer for calibration of stereo vision rigs","authors":"A. Mielczarek, D. Makowski, P. Perek, A. Napieralski, Przemyslaw Sztoch","doi":"10.1109/RTC.2016.7543175","DOIUrl":null,"url":null,"abstract":"The paper presents a versatile solution facilitating calibration of stereoscopic camera rigs for 3D cinematography. Manual calibration of the rig can easily take several hours. The proposed device eases this process by providing the operator with several predefined layouts of the images from the cameras. The Image Analyzer is a compact stand-alone device, designed for the portable 19\" racks. Almost all of the video processing is performed on a modern Xilinx FPGA. It is supported by ARM computer to provide control and video streaming over the Ethernet. The article presents its hardware design, as well as FPGA firmware and software architectures.","PeriodicalId":383702,"journal":{"name":"2016 IEEE-NPSS Real Time Conference (RT)","volume":"55 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE-NPSS Real Time Conference (RT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RTC.2016.7543175","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
The paper presents a versatile solution facilitating calibration of stereoscopic camera rigs for 3D cinematography. Manual calibration of the rig can easily take several hours. The proposed device eases this process by providing the operator with several predefined layouts of the images from the cameras. The Image Analyzer is a compact stand-alone device, designed for the portable 19" racks. Almost all of the video processing is performed on a modern Xilinx FPGA. It is supported by ARM computer to provide control and video streaming over the Ethernet. The article presents its hardware design, as well as FPGA firmware and software architectures.