The study of strip readout prototype for ATLAS Phase-I Muon trigger upgrade

Abstract

We will present the strip readout prototype for ATLAS small-strip Thin Gap Chamber(sTGC) Phase-I Muon trigger upgrade, which named strip Front End Board(sFEB). The prototype includes 8 VMM2 ASICs for strip signal conditioning, a Xilinx Kintex-7 FPGA for VMM2 configuration and events readout, a commercial ethernet chip working at the physical layer. The sFEB prototype is described in details.