2015 IEEE 20th International Mixed-Signals Testing Workshop (IMSTW)最新文献_第3页

Digitally-compatible ring oscillator frequency driven tuning of CN-TFT amplifiers: Performance compensation under statistical and morphological variations CN-TFT放大器的数字兼容环振荡器频率驱动调谐:统计和形态变化下的性能补偿

2015 IEEE 20th International Mixed-Signals Testing Workshop (IMSTW) Pub Date : 2015-06-24 DOI: 10.1109/IMS3TW.2015.7177860

Suvadeep Banerjee, M. Gupta, A. Banerjee, Satish Kumar, A. Chatterjee

{"title":"Digitally-compatible ring oscillator frequency driven tuning of CN-TFT amplifiers: Performance compensation under statistical and morphological variations","authors":"Suvadeep Banerjee, M. Gupta, A. Banerjee, Satish Kumar, A. Chatterjee","doi":"10.1109/IMS3TW.2015.7177860","DOIUrl":"https://doi.org/10.1109/IMS3TW.2015.7177860","url":null,"abstract":"Carbon Nanotube network based Thin-Film Transistors (CN-TFTs) are excellent candidates for next generation flexible electronics applications. However CN-TFT circuits suffer from imperfections due to morphological variations of fabricated carbon nanotube geometries that cause wide performance variations in analog amplifiers built from these CN-TFTs. Improved fabrication methods and sophisticated process control techniques are not sufficient for tackling these imperfections. In this paper, a new digitally-compatible tuning method is proposed for CN-TFT based amplifier designs. The amplifier is placed in a ring-oscillator configuration using two additional digital inverters, appropriately modified to allow oscillation of the inverter-inverting amplifier-inverter configuration. The frequency of oscillation is then used to drive a tuning algorithm that recovers the performance of the amplifier under statistical and morphological fabrication process variations. The method is very easy to implement and simulation studies show excellent results.","PeriodicalId":370144,"journal":{"name":"2015 IEEE 20th International Mixed-Signals Testing Workshop (IMSTW)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116953365","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Evaluation of harmonic cancellation techniques for sinusoidal signal generation in mixed-signal BIST 混合信号BIST中正弦信号产生谐波对消技术的评价

2015 IEEE 20th International Mixed-Signals Testing Workshop (IMSTW) Pub Date : 2015-06-24 DOI: 10.1109/IMS3TW.2015.7177877

Hani Malloug, M. Barragán, S. Mir

引用次数: 1

Oscillation-based approach applied to a low-power analog front-end for an implantable cardiac device 基于振荡的方法应用于可植入心脏装置的低功耗模拟前端

2015 IEEE 20th International Mixed-Signals Testing Workshop (IMSTW) Pub Date : 2015-06-24 DOI: 10.1109/IMS3TW.2015.7177878

J. Miguel, D. Rivas, Y. Lechuga, M. A. Allende, M. Martinez

引用次数: 4

Sensitivity calibration and test of a 3D hall integrated sensor device with an external magnetic field source on a new ATE concept 基于新ATE概念的具有外部磁场源的3D霍尔集成传感器设备的灵敏度校准和测试

2015 IEEE 20th International Mixed-Signals Testing Workshop (IMSTW) Pub Date : 2015-06-24 DOI: 10.1109/IMS3TW.2015.7177863

L. Giorgi

引用次数: 2

Smart power mixed ICs parasitic bipolar coupling issues analysis with a dedicated on-chip sensor 智能电源混合集成电路寄生双极耦合问题分析与专用片上传感器

2015 IEEE 20th International Mixed-Signals Testing Workshop (IMSTW) Pub Date : 2015-06-24 DOI: 10.1109/IMS3TW.2015.7177886

V. Tomasevic, A. Steinmair, A. Boyer, S. Ben Dhia, B. Weiss, P. Rust, E. Seebacher

{"title":"Smart power mixed ICs parasitic bipolar coupling issues analysis with a dedicated on-chip sensor","authors":"V. Tomasevic, A. Steinmair, A. Boyer, S. Ben Dhia, B. Weiss, P. Rust, E. Seebacher","doi":"10.1109/IMS3TW.2015.7177886","DOIUrl":"https://doi.org/10.1109/IMS3TW.2015.7177886","url":null,"abstract":"The presence of low power and high voltage devices in Smart Power integrated circuits (ICs) cause parasitic substrate interaction between switched power stages and sensitive analog blocks. This in turn is the major cause of failure of Smart Power ICs, inducing costly circuit redesign. In order to predict these harmful events, there is a need in IC industry to create a link between circuit designs, modelling and implementation in innovative software tools. Thus there is a real need to validate these new SPICE models by measuring the high voltage perturbations that activate parasitic structures in the substrate directly on the chip. This paper presents an analysis of parasitic bipolar coupling issues in Smart Power Mixed ICs with a dedicated on-chip sensor. The possible scenarios based on PNP and NPN activation are derived and a real life test vehicle is introduced and investigated in detail. For verification purposes multiple of the developed on-chip sensors are placed close to the expected sensitive nodes. The architecture and the capabilities of the sensor like multiplexing, sensitivity and the calibration possibility are explained in detail. The on-chip sensor is used as an on-chip oscilloscope to measure the transient voltage fluctuations induced by high voltage activity and coupled by the substrate. The test vehicle was developed and produced in ams HV CMOS technology.","PeriodicalId":370144,"journal":{"name":"2015 IEEE 20th International Mixed-Signals Testing Workshop (IMSTW)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122180529","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Determination of the aging offset voltage of AMR sensors based on accelerated degradation test 基于加速退化试验的AMR传感器老化失调电压的确定

2015 IEEE 20th International Mixed-Signals Testing Workshop (IMSTW) Pub Date : 2015-06-01 DOI: 10.1109/IMS3TW.2015.7177871

Andreina Zambrano, H. Kerkhoff

引用次数: 2