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2015 IEEE 20th International Mixed-Signals Testing Workshop (IMSTW)最新文献

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Buck converter modeling in SystemVerilog for verification and virtual test applications Buck转换器在SystemVerilog中的建模，用于验证和虚拟测试应用
2015 IEEE 20th International Mixed-Signals Testing Workshop (IMSTW) Pub Date : 2015-06-24 DOI: 10.1109/IMS3TW.2015.7177865
Elvis Shera, C. Wegener
{"title":"Buck converter modeling in SystemVerilog for verification and virtual test applications","authors":"Elvis Shera, C. Wegener","doi":"10.1109/IMS3TW.2015.7177865","DOIUrl":"https://doi.org/10.1109/IMS3TW.2015.7177865","url":null,"abstract":"Functional verification and Virtual Test, which is verification of a test procedure, of mixed-signal circuits share the need for efficient simulation capabilities. Switching DC/DC converters are a particularly hard problem, because traditional SPICE-type simulation approaches incur simulation efforts which prevent one from covering all conceivable use-cases. The new IEEE 1800-2012 standard for SystemVerilog (SV) introduces the concepts of user-defined data types (UDT) and user defined resolution functions (UDR) which allows for easier modeling of the loading effects. Such improvementes together with the high performance of an event-driven simulator increase the capability of SystemVerilog in supporting efficient, fast to simulate and yet accurate models of mixed-signal circuits. In this contribution, we propose a block-level modeling strategy which considers the loading effects caused by either subsequent blocks in the signal path or by faults assumed in the circuit.","PeriodicalId":370144,"journal":{"name":"2015 IEEE 20th International Mixed-Signals Testing Workshop (IMSTW)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124375766","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
A generic methodology for building efficient prediction models in the context of alternate testing 在交替测试环境中构建有效预测模型的通用方法
2015 IEEE 20th International Mixed-Signals Testing Workshop (IMSTW) Pub Date : 2015-06-24 DOI: 10.1109/IMS3TW.2015.7177873
S. Larguech, F. Azais, S. Bernard, M. Comte, V. Kerzérho, M. Renovell
{"title":"A generic methodology for building efficient prediction models in the context of alternate testing","authors":"S. Larguech, F. Azais, S. Bernard, M. Comte, V. Kerzérho, M. Renovell","doi":"10.1109/IMS3TW.2015.7177873","DOIUrl":"https://doi.org/10.1109/IMS3TW.2015.7177873","url":null,"abstract":"A promising solution to reduce the testing costs of analog/RF circuits is the alternate test strategy, which permits to replace costly specification measurements by simple low-cost indirect measurements. This approach has been widely explored and demonstrated in the literature on various case studies over the past twenty years. However it is clear that the efficiency of this strategy strongly depends on the quality of the regression models used to map the indirect measurements to the device specifications. In this paper, we present a generic methodology for building efficient prediction models from a large set of indirect measurements candidates. Results are illustrated on a case study for which we have experimental test data.","PeriodicalId":370144,"journal":{"name":"2015 IEEE 20th International Mixed-Signals Testing Workshop (IMSTW)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114540582","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Reliability of SAR ADCs and associated embedded instrument detection SAR adc及相关嵌入式仪器检测的可靠性
2015 IEEE 20th International Mixed-Signals Testing Workshop (IMSTW) Pub Date : 2015-06-24 DOI: 10.1109/IMS3TW.2015.7177870
J. Wan, H. Kerkhoff
{"title":"Reliability of SAR ADCs and associated embedded instrument detection","authors":"J. Wan, H. Kerkhoff","doi":"10.1109/IMS3TW.2015.7177870","DOIUrl":"https://doi.org/10.1109/IMS3TW.2015.7177870","url":null,"abstract":"Successive-approximation-register (SAR) analog-to-digital converters (ADCs) represent the majority of the ADC market from medium to high resolution ADCs. Due to its low power, high-performance and small area in Mega-Hz range, SAR ADCs are increasingly attractive for todays safe-critical applications like automotive. Recently, much research has been carried out on self-calibrations of SAR ADCs, which are mostly focussed on passive capacitor banks inside SAR ADCs. However the reliability of SAR ADCs is rarely reported, which is more related to the active circuit parts and is also essential for safe-critical applications. In this paper, the focus will be on the reliability effects and associated embedded instrument detection of a 10-bits SAR ADC in 65nm CMOS technology. The NBTI degradation in the bootstrapped switches, self-timing asynchronous SAR logics, input buffer and comparator inside a 10-bits SAR ADC are investigated as well as the overall performance degradation of the ADC. Finally, embedded instrument methods are proposed to detect these reliability influences in SAR ADCs.","PeriodicalId":370144,"journal":{"name":"2015 IEEE 20th International Mixed-Signals Testing Workshop (IMSTW)","volume":"35 4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134423245","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Verification and validation of AMS systems: Towards coverage of uncertainties AMS系统的验证与确认:迈向不确定度的覆盖
2015 IEEE 20th International Mixed-Signals Testing Workshop (IMSTW) Pub Date : 2015-06-24 DOI: 10.1109/IMS3TW.2015.7177882
C. Grimm, Carna Radojicic
{"title":"Verification and validation of AMS systems: Towards coverage of uncertainties","authors":"C. Grimm, Carna Radojicic","doi":"10.1109/IMS3TW.2015.7177882","DOIUrl":"https://doi.org/10.1109/IMS3TW.2015.7177882","url":null,"abstract":"In today's systems, analog and mixed-signal (AMS) circuits are tightly interwoven with HW/SW systems and the application. Hence, a verification of the AMS part alone is not sufficient any more, in particular considering its application in Cyber-Physical Systems. In order to guarantee `first time right', the accuracy of the models, the validation of the application fitness, and in changing, uncertain environments will become at least as important. In this paper we discuss and give an overview of methods that strive for validation of AMS systems with increased coverage. We in particular focus modeling, verification and validation of uncertainties in the context of Cyber-Physical Systems.","PeriodicalId":370144,"journal":{"name":"2015 IEEE 20th International Mixed-Signals Testing Workshop (IMSTW)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126962480","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Considerations for light sources: For semiconductor light sensor test 光源注意事项:用于半导体光传感器测试
2015 IEEE 20th International Mixed-Signals Testing Workshop (IMSTW) Pub Date : 2015-06-24 DOI: 10.1109/IMS3TW.2015.7177862
Martin Buck
{"title":"Considerations for light sources: For semiconductor light sensor test","authors":"Martin Buck","doi":"10.1109/IMS3TW.2015.7177862","DOIUrl":"https://doi.org/10.1109/IMS3TW.2015.7177862","url":null,"abstract":"There are an ever increasing number of applications for light sensors. These applications are getting increasingly more sophisticated; ranging from encoders for position sensing to ambient light sensors and proximity sensors for many consumer electronic devices. This presents a new challenge for test development engineers who now must include suitable light sources to test the sensor. The problem that may face the engineer is what needs to be considered when designing the light source. This paper discusses the basics of light source design and should provide the reader with an excellent base from which they can develop their own solutions.","PeriodicalId":370144,"journal":{"name":"2015 IEEE 20th International Mixed-Signals Testing Workshop (IMSTW)","volume":"2005 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114196341","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A fuzzy logic approach for highly dependable medical wearable systems 高可靠医疗可穿戴系统的模糊逻辑方法
2015 IEEE 20th International Mixed-Signals Testing Workshop (IMSTW) Pub Date : 2015-06-24 DOI: 10.1109/IMS3TW.2015.7177874
Cristina C. Oliveira, J. Machado da Silva
{"title":"A fuzzy logic approach for highly dependable medical wearable systems","authors":"Cristina C. Oliveira, J. Machado da Silva","doi":"10.1109/IMS3TW.2015.7177874","DOIUrl":"https://doi.org/10.1109/IMS3TW.2015.7177874","url":null,"abstract":"A new methodology for fault detection on wearable medical devices is proposed. The main strategy relies on correctly classifying the captured physiological signals, in order to distinguish whether the actual cause is a wearer health abnormality or a system functional flaw. Data fusion techniques, namely fuzzy logic, are employed to process the captured data, like the electrocardiogram and blood pressure, to increase the trust levels with which diagnostics are made. Concerning the wearer condition, additional information is provided after classifying the set of signals into normal or abnormal (e.g. arrhythmia, chest angina, and stroke). As for the monitoring system, once an abnormal situation is detected in its operation or in the sensors, a set of tests is run to check if actually the wearer shows a degradation of his health condition or if the system is reporting erroneous values.","PeriodicalId":370144,"journal":{"name":"2015 IEEE 20th International Mixed-Signals Testing Workshop (IMSTW)","volume":"62 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134039671","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Experiences with an industrial analog fault simulator and engineering intuition 具有工业模拟故障模拟器经验和工程直觉
2015 IEEE 20th International Mixed-Signals Testing Workshop (IMSTW) Pub Date : 2015-06-24 DOI: 10.1109/IMS3TW.2015.7177867
S. Sunter
{"title":"Experiences with an industrial analog fault simulator and engineering intuition","authors":"S. Sunter","doi":"10.1109/IMS3TW.2015.7177867","DOIUrl":"https://doi.org/10.1109/IMS3TW.2015.7177867","url":null,"abstract":"While working with designers and DFT engineers in companies evaluating an “industrial-strength” analog fault simulator, it became apparent that intuition and theory often differ regarding random sampling of defects to simulate. This paper explores these differences. In one case, it was hoped that simulating more defects would increase the estimated coverage. In a second case, it was assumed that pre-simulation analysis of a circuit would more efficiently reveal defects that need to be simulated. In a third, engineering intuition said at least 1% of all potential defects must be simulated to estimate coverage. In a fourth case, it was thought that fault coverage for portions of a circuit could be gleaned from results for faults randomly injected into the whole circuit. In a fifth, the types of faults injected were assumed to greatly affect coverage. In a last case, intuitively it seemed that improving a test to detect the most-likely defects that were undetected would have the greatest impact on coverage.","PeriodicalId":370144,"journal":{"name":"2015 IEEE 20th International Mixed-Signals Testing Workshop (IMSTW)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121793088","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Substrate modeling to improve reliability of high voltage technologies 基板建模以提高高压技术的可靠性
2015 IEEE 20th International Mixed-Signals Testing Workshop (IMSTW) Pub Date : 2015-06-24 DOI: 10.1109/IMS3TW.2015.7177884
C. Stefanucci, P. Buccella, Yasser Moursy, Hao Zou, R. Iskander, M. Kayal, J. Sallese
{"title":"Substrate modeling to improve reliability of high voltage technologies","authors":"C. Stefanucci, P. Buccella, Yasser Moursy, Hao Zou, R. Iskander, M. Kayal, J. Sallese","doi":"10.1109/IMS3TW.2015.7177884","DOIUrl":"https://doi.org/10.1109/IMS3TW.2015.7177884","url":null,"abstract":"In Smart Power ICs there is the need of new substrate models to be integrated in the design flow of power circuits. This work reports the latest results regarding the substrate modeling methodology based on three-dimensional lumped components extraction of diodes, resistors and contacts. The substrate network including lateral and vertical parasitic bipolar transistor can be automatically created from any chip layout including temperature and geometry variations. In such a way fast dc and transient analysis can be carried out in early design stages to improve reliability of high voltage ICs. Since the high variability and complexity on modern Smart Power technologies, a flexible model is required. This work discusses all the features related to technology variations. Circuit simulator results are then compared with TCAD simulations.","PeriodicalId":370144,"journal":{"name":"2015 IEEE 20th International Mixed-Signals Testing Workshop (IMSTW)","volume":"72 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127578704","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
A CAD integrated solution of substrate modeling for industrial IC design 工业集成电路设计中基板建模的CAD集成解决方案
2015 IEEE 20th International Mixed-Signals Testing Workshop (IMSTW) Pub Date : 2015-06-24 DOI: 10.1109/IMS3TW.2015.7177885
Hao Zou, Yasser Moursy, R. Iskander, J. Chaput, M. Louerat, C. Stefanucci, Pietro Buccela, M. Kayal, J. Sallese, T. Gneiting, H. Alius, A. Steinmair, E. Seebacher
{"title":"A CAD integrated solution of substrate modeling for industrial IC design","authors":"Hao Zou, Yasser Moursy, R. Iskander, J. Chaput, M. Louerat, C. Stefanucci, Pietro Buccela, M. Kayal, J. Sallese, T. Gneiting, H. Alius, A. Steinmair, E. Seebacher","doi":"10.1109/IMS3TW.2015.7177885","DOIUrl":"https://doi.org/10.1109/IMS3TW.2015.7177885","url":null,"abstract":"Smart Power IC integrating high voltage devices with low voltage control blocks becomes more and more popular in automotive industry recently. Minority carriers injected into the substrate during switching of high power stages cause malfunction of sensitive nearby low voltage devices. Sometimes this may be destructive due to the presence of triggered latch up. The minority carriers propagation is extremely hard to model and difficult to predict using existing commercial standard design flow. In this paper, we propose a Computer-Aided-Design solution to characterise the substrate vertical and lateral parasitic for Smart Power IC in automotive applications. Investigation of complex benchmark structures is presented. SPICE simulations are performed for extracted 3D substrate netlist and compared to measurements. Good fitting between simulation and measurement validates the effectiveness and accuracy of the proposed CAD tool.","PeriodicalId":370144,"journal":{"name":"2015 IEEE 20th International Mixed-Signals Testing Workshop (IMSTW)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131607766","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Efficient contact screening of compact NVMs for high reliabilty automotive applications 用于高可靠性汽车应用的紧凑型NVMs的高效接触面筛选
2015 IEEE 20th International Mixed-Signals Testing Workshop (IMSTW) Pub Date : 2015-06-24 DOI: 10.1109/IMS3TW.2015.7177864
F. Leisenberger, G. Schatzberger
{"title":"Efficient contact screening of compact NVMs for high reliabilty automotive applications","authors":"F. Leisenberger, G. Schatzberger","doi":"10.1109/IMS3TW.2015.7177864","DOIUrl":"https://doi.org/10.1109/IMS3TW.2015.7177864","url":null,"abstract":"In modern automotive designs double contacts are mandatory to achieve high reliability products and avoid field returns due to contact issues during the lifetime of the product. Using double contacts in compact digital IPs like RAM, ROM or NVMs leads to a dramatic area penalty. High area efficient NMVs are using shared contacts to minimize the area needed to realize the NVM bit cells. Using double contacts would lead to an area increase of approx. 50% of the NVM memory plane. The high quality standard defined for automotive applications can only be fulfilled with a sophisticated contact screening procedure. This work will present a contact screening procedure which is able to detect contacts with a resistivity outside the main contact resistivity distribution. Those outlier have a potential danger to fail during lifetime as shown in this paper.","PeriodicalId":370144,"journal":{"name":"2015 IEEE 20th International Mixed-Signals Testing Workshop (IMSTW)","volume":"71 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134449747","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
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