{"title":"Passive dense stereo vision on the Myriad2 VPU","authors":"L. Puglia, M. Ionica, G. Raiconi, D. Moloney","doi":"10.1109/HOTCHIPS.2016.7936240","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2016.7936240","url":null,"abstract":"This article consists only of a collection of slides from the author's conference presentation.","PeriodicalId":363333,"journal":{"name":"2016 IEEE Hot Chips 28 Symposium (HCS)","volume":"99 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114977315","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"VR and AR anytime and everywhere: Contributions of PMD depth sensing to an evolving ecosystem","authors":"B. Buxbaum","doi":"10.1109/HOTCHIPS.2016.7936195","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2016.7936195","url":null,"abstract":"","PeriodicalId":363333,"journal":{"name":"2016 IEEE Hot Chips 28 Symposium (HCS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129511570","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Brent Bohnenstiehl, Aaron Stillmaker, J. Pimentel, Timothy Andreas, Bin Liu, A. Tran, E. Adeagbo, B. Baas
{"title":"KiloCore: A 32 nm 1000-processor array","authors":"Brent Bohnenstiehl, Aaron Stillmaker, J. Pimentel, Timothy Andreas, Bin Liu, A. Tran, E. Adeagbo, B. Baas","doi":"10.1109/HOTCHIPS.2016.7936218","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2016.7936218","url":null,"abstract":"","PeriodicalId":363333,"journal":{"name":"2016 IEEE Hot Chips 28 Symposium (HCS)","volume":"403 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126679545","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
M. Lin, Chien-Chun Tsai, K. Hsieh, Wen-Hung Huang, Yu-Chi Chen, Shu-Chun Yang, Chin-Ming Fu, H. Zhan, Jinn-Yeh Chien, Shao-Yu Li, Y.-H. Chen, C. Kuo, S. Tai, Kazuyoshi Yamada
{"title":"A 16nm 256-bit wide 89.6GByte/s total bandwidth in-package interconnect with 0.3V swing and 0.062pJ/bit power in InFO package","authors":"M. Lin, Chien-Chun Tsai, K. Hsieh, Wen-Hung Huang, Yu-Chi Chen, Shu-Chun Yang, Chin-Ming Fu, H. Zhan, Jinn-Yeh Chien, Shao-Yu Li, Y.-H. Chen, C. Kuo, S. Tai, Kazuyoshi Yamada","doi":"10.1109/HOTCHIPS.2016.7936211","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2016.7936211","url":null,"abstract":"● An in-package interconnect for in-package memory application in InFO package has been demonstrated ■ Technology: TSMC 16FF + InFO ● 89.6GByte/s total bandwidth is achieved with 256-DQ operating in 2.8Gbit/s and 0.3V-swing ■ Low power: IO (0.062pJ/bit); PHY (0.424pJ/bit) ■ Low latency: Write (4.75T+1.5T=6.25T); Read (2+1.875=3.875T) ● 0.3V signal integrity on the un-probed IO has been clarified ■ 420ps (0.84UI) Eye width; 225mV (75%) Eye height ● Prompt and automatic timing-calibration scheme","PeriodicalId":363333,"journal":{"name":"2016 IEEE Hot Chips 28 Symposium (HCS)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114913990","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Song Han, Xingyu Liu, Huizi Mao, Jing Pu, A. Pedram, M. Horowitz, B. Dally
{"title":"Deep compression and EIE: Efficient inference engine on compressed deep neural network","authors":"Song Han, Xingyu Liu, Huizi Mao, Jing Pu, A. Pedram, M. Horowitz, B. Dally","doi":"10.1109/HOTCHIPS.2016.7936226","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2016.7936226","url":null,"abstract":"This article consists only of a collection of slides from the author's conference presentation.","PeriodicalId":363333,"journal":{"name":"2016 IEEE Hot Chips 28 Symposium (HCS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129097682","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"100Gbit/s, 120km, PAM 4 based switch to switch, layer 2 silicon photonics based optical interconnects for datacenters","authors":"R. Nagarajan, S. Bhoja, Tom Issenhuth","doi":"10.1109/HOTCHIPS.2016.7936212","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2016.7936212","url":null,"abstract":"This article consists only of a collection of slides from the author's conference presentation.","PeriodicalId":363333,"journal":{"name":"2016 IEEE Hot Chips 28 Symposium (HCS)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121096126","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A new ×86 core architecture for the next generation of computing","authors":"Mike Clark","doi":"10.1109/HOTCHIPS.2016.7936224","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2016.7936224","url":null,"abstract":"","PeriodicalId":363333,"journal":{"name":"2016 IEEE Hot Chips 28 Symposium (HCS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129747606","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Memory technology and applications","authors":"Allen Rush","doi":"10.1109/HOTCHIPS.2016.7936173","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2016.7936173","url":null,"abstract":"◢ Factors driving advanced memory designs - Applications requiring real time video, VR, advanced graphics ◢ Increased CPU/GPU performance - Need for balancing BW, capacity - HBM solutions ◢ Emerging applications with unique memory requirements - ML - training and inference ◢ Novel solutions for PE-Mem structures ◢ Big Data - More data upload - Cloud DL: massive parameter and training data sets","PeriodicalId":363333,"journal":{"name":"2016 IEEE Hot Chips 28 Symposium (HCS)","volume":"307 7","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131923416","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Kaiyuan Guo, Lingzhi Sui, Jiantao Qiu, Song Yao, Song Han, Yu Wang, Huazhong Yang
{"title":"From model to FPGA: Software-hardware co-design for efficient neural network acceleration","authors":"Kaiyuan Guo, Lingzhi Sui, Jiantao Qiu, Song Yao, Song Han, Yu Wang, Huazhong Yang","doi":"10.1109/HOTCHIPS.2016.7936208","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2016.7936208","url":null,"abstract":"Artificial neural networks, which dominate artificial intelligence applications such as object recognition and speech recognition, are in evolution. To apply neural networks to wider applications, customized hardware are necessary since CPU and GPU are not efficient enough. FPGA can be an ideal platform for neural network acceleration since it is programmable and can achieve much higher energy efficiency compared with general-purpose processors. However, the long development period and insufficient performance of traditional FPGA acceleration solutions prevent it from wide utilization. In this work, we propose a complete design flow to achieve both fast deployment and high energy efficiency for accelerating neural networks on FPGA. Deep compression and data quantization are employed to exploit the redundancy in algorithm and reduce both computational and memory complexity. Two architecture designs for CNN and DNN/RNN will be introduced together with the compilation environment. Evaluated on Xilinx Zynq 7000 and Kintex Ultrascale series FPGA with realworld neural networks, up to 10 times higher energy efficiency can be achieved compared with mobile GPU and desktop GPU.","PeriodicalId":363333,"journal":{"name":"2016 IEEE Hot Chips 28 Symposium (HCS)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132296147","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}