M. Lin, Chien-Chun Tsai, K. Hsieh, Wen-Hung Huang, Yu-Chi Chen, Shu-Chun Yang, Chin-Ming Fu, H. Zhan, Jinn-Yeh Chien, Shao-Yu Li, Y.-H. Chen, C. Kuo, S. Tai, Kazuyoshi Yamada
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A 16nm 256-bit wide 89.6GByte/s total bandwidth in-package interconnect with 0.3V swing and 0.062pJ/bit power in InFO package
● An in-package interconnect for in-package memory application in InFO package has been demonstrated ■ Technology: TSMC 16FF + InFO ● 89.6GByte/s total bandwidth is achieved with 256-DQ operating in 2.8Gbit/s and 0.3V-swing ■ Low power: IO (0.062pJ/bit); PHY (0.424pJ/bit) ■ Low latency: Write (4.75T+1.5T=6.25T); Read (2+1.875=3.875T) ● 0.3V signal integrity on the un-probed IO has been clarified ■ 420ps (0.84UI) Eye width; 225mV (75%) Eye height ● Prompt and automatic timing-calibration scheme
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