Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03.最新文献_第6页

Full chip leakage-estimation considering power supply and temperature variations 考虑电源和温度变化的全芯片泄漏估计

Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03. Pub Date : 2003-08-25 DOI: 10.1145/871506.871529

Haihua Su, Frank Liu, A. Devgan, E. Acar, S. Nassif

引用次数: 247

A systems approach to molecular electronics 分子电子学的系统方法

Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03. Pub Date : 2003-08-25 DOI: 10.1145/871506.871596

J. Heath

引用次数: 0

Electric-energy generation using variable-capacitive resonator for power-free LSI: efficiency analysis and fundamental experiment 无电大规模集成电路用变容谐振器发电效率分析及基础实验

Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03. Pub Date : 2003-08-25 DOI: 10.1109/LPE.2003.1231861

M. Miyazaki, Hidetoshi Tanaka, G. Ono, T. Nagano, N. Ohkubo, T. Kawahara, K. Yano

{"title":"Electric-energy generation using variable-capacitive resonator for power-free LSI: efficiency analysis and fundamental experiment","authors":"M. Miyazaki, Hidetoshi Tanaka, G. Ono, T. Nagano, N. Ohkubo, T. Kawahara, K. Yano","doi":"10.1109/LPE.2003.1231861","DOIUrl":"https://doi.org/10.1109/LPE.2003.1231861","url":null,"abstract":"A power generator based on a vibration-to-electric energy converter using a variable-resonating capacitor is experimentally demonstrated. The generator consists of a complete system with a mechanical variable capacitor, a charge-transporting LC tank circuit and an externally powered timing-capture controller. A practical design methodology to maximize the efficiency of the vibration-to-electric energy generation system is also described. The efficiency of the generator is estimated based on three factors: the mechanical-energy loss, the charge-transportation loss, and the timing-capture loss. Through the mechanical-energy analysis, the optimum condition for the resonance is found. The parasitic elements in the charge transporter and the timing management of the capture scheme dominate the generation efficiency. These analyses enable the optimum design of the energy-generation system. An experimentally fabricated and measured generator theoretically has a maximum power of 580 nW; the measured power is 120 nW, so conversion efficiency is 21%. This results from a 43% mechanical energy loss and a 63% charge-transportation loss. The timing-capture scheme is manually determined and externally powered in the experiment, so its efficiency is not considered. With our result, a new system LSI application with an embedded power source can be explored for the ubiquitous computing era.","PeriodicalId":355883,"journal":{"name":"Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03.","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-08-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121134509","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 95

Exploiting compiler-generated schedules for energy savings in high-performance processors 利用编译器生成的调度来节省高性能处理器的能源

Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03. Pub Date : 2003-08-25 DOI: 10.1145/871506.871608

M. Valluri, L. John, H. Hanson

引用次数: 13

Simultaneous Vt selection and assignment for leakage optimization 泄漏优化的同步Vt选择和分配

Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03. Pub Date : 2003-08-25 DOI: 10.1145/871506.871543

Ankur Srivastava

引用次数: 46

Energy-efficient data scrambling on memory-processor interfaces 内存处理器接口上的高能效数据置乱

Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03. Pub Date : 2003-08-25 DOI: 10.1145/871506.871517

L. Benini, A. Galati, A. Macii, E. Macii, M. Poncino

引用次数: 18

Power-aware scheduling of conditional task graphs in real-time multiprocessor systems 实时多处理器系统中条件任务图的功率感知调度

Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03. Pub Date : 2003-08-25 DOI: 10.1145/871506.871607

Dongkun Shin, Jihong Kim

引用次数: 78

Microprocessor pipeline energy analysis 微处理器管道能量分析

Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03. Pub Date : 2003-08-25 DOI: 10.1145/871506.871577

Karthikeyan Natarajan, H. Hanson, S. Keckler, C. R. Moore, D. Burger

引用次数: 24

Low power requirements for future digital life style 未来数字生活方式的低功耗要求

Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03. Pub Date : 2003-08-25 DOI: 10.1145/871506.871508

Ki Won Lee

{"title":"Low power requirements for future digital life style","authors":"Ki Won Lee","doi":"10.1145/871506.871508","DOIUrl":"https://doi.org/10.1145/871506.871508","url":null,"abstract":"Rapid advancement of semiconductor, personal computing, and mobile communications technology during the last few decades has been transforming lifestyle into \"digital lifestyle\", in which one can create, share, and enjoy multimedia information in a personalized virtual space in a mobile environment. There are, in general, three key enabling factors to realize the future digital lifestyle: easily accessible multimedia contents for diversified user applications, communication and information infrastructure to support such access from the user, and intelligent user devices to deliver such digital contents in a user friendly manner. In this talk, future prospects of user devices in consumer electronics space and associated technological challenges, especially low power aspects, are discussed. A brief overview of the current status of low power technology employed by many portable devices and wireless data collection systems is followed by the suggestion of future research areas for low power user devices in the areas of portable power sources, components, software architecture, and SOC (system-on-chip) technology. Finally, Samsung's R&D strategy in low power technology is discussed.","PeriodicalId":355883,"journal":{"name":"Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03.","volume":"88 3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-08-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128302583","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Minimization of dynamic and static power through joint assignment of threshold voltages and sizing optimization [logic IC design] 通过阈值电压分配和尺寸优化实现动态和静态功率的最小化[逻辑IC设计]

Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03. Pub Date : 2003-08-25 DOI: 10.1145/871506.871545

David Nguyen, A. Davare, M. Orshansky, D. Chinnery, B. Thompson, K. Keutzer

引用次数: 168