微处理器管道能量分析

Karthikeyan Natarajan, H. Hanson, S. Keckler, C. R. Moore, D. Burger
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引用次数: 24

摘要

高性能微处理器功耗的增加部分是由于大问题、高度投机的核心的大功耗开销。微体系结构推测,比如分支预测,增加了指令吞吐量,但是由于错误推测的指令浪费了功率,因此带来了功率负担。管道过度供应提供了通常未使用的多余资源。在本文中,我们使用Alpha 21264的详细性能和功耗模型来测量有用的能量和由于错误猜测和过度配置而浪费的精力。我们的实验表明,刷新指令约占总能量的6%,而过度配置平均征收17%的税。这些结果表明了在整个微处理器管道中节能和提高能源效率的机会。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Microprocessor pipeline energy analysis
The increase in high-performance microprocessor power consumption is due in part to the large power overhead of wide-issue, highly speculative cores. Microarchitectural speculation, such as branch prediction, increases instruction throughput but carries a power burden due to wasted power for mis-speculated instructions. Pipeline over-provisioning supplies excess resources which often go unused. In this paper, we use our detailed performance and power model for an Alpha 21264 to measure both the useful energy and the wasted effort due to mis-speculation and over-provisioning. Our experiments show that flushed instructions account for approximately 6% of total energy, while over-provisioning imposes a tax of 17% on average. These results suggest opportunities for power savings and energy efficiency throughout microprocessor pipelines.
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