Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03.最新文献_第7页

Elements of low power design for integrated systems 集成系统的低功耗设计要素

Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03. Pub Date : 2003-08-25 DOI: 10.1145/871506.871558

S. Kang

引用次数: 32

Reducing reorder buffer complexity through selective operand caching 通过选择性操作数缓存减少重排序缓冲区的复杂性

Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03. Pub Date : 2003-08-25 DOI: 10.1145/871506.871564

Gürhan Küçük, D. Ponomarev, O. Ergin, K. Ghose

{"title":"Reducing reorder buffer complexity through selective operand caching","authors":"Gürhan Küçük, D. Ponomarev, O. Ergin, K. Ghose","doi":"10.1145/871506.871564","DOIUrl":"https://doi.org/10.1145/871506.871564","url":null,"abstract":"Modern superscalar processors implement precise interrupts by using the Reorder Buffer (ROB). In some microarchitectures, such as the Intel P6, the ROB also serves as a repository for the uncommitted results. In these designs, the ROB is a complex multi-ported structure that dissipates a significant percentage of the overall chip power. Recently, a mechanism was introduced for reducing the ROB complexity and its power dissipation through the complete elimination of read ports for reading out source operands. The resulting performance degradation is countered by caching the most recently produced results in a small set of associatively-addressed latches (\"retention latches\"). We propose an enhancement to the above technique by leveraging the notion of short-lived operands (values targeting the registers that are renamed by the time the instruction producing the value reaches the writeback stage). As much as 87% of all generated values are short lived for the SPEC 2000 benchmarks. Significant improvements in the Utilization of retention latches, the overall performance, complexity and power are achieved by not caching short-lived values in the retention latches. As few as two retention latches allow all source operand read ports on the ROB to be completely eliminated with very little impact on performance.","PeriodicalId":355883,"journal":{"name":"Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03.","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-08-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128055183","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 117

A 0.123 mW 7.25 GHz static frequency divider by 8 in a 120-nm SOI technology 一个0.123 mW 7.25 GHz静态分频器，采用8级120nm SOI技术

Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03. Pub Date : 2003-08-25 DOI: 10.1145/871506.871615

J. Plouchart, Jonghae Kim, H. Recoules, N. Zamdmer, Yue Tan, M. Sherony, A. Ray, L. Wagner

引用次数: 7

Lightweight set buffer: low power data cache for multimedia application 轻量级集缓存:多媒体应用的低功耗数据缓存

Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03. Pub Date : 2003-08-25 DOI: 10.1145/871506.871573

Jun Yang, Youtao Zhang

引用次数: 5

ESTIMA: an architectural-level power estimator for multi-ported pipelined register files 一个用于多端口流水线寄存器文件的架构级功率估计器

Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03. Pub Date : 2003-08-25 DOI: 10.1145/871506.871579

Kavel M. Büyüksahin, Priyadarsan Patra, F. Najm

引用次数: 8

Low power RF IC design for wireless communication 用于无线通信的低功耗射频集成电路设计

Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03. Pub Date : 2003-08-25 DOI: 10.1145/871506.871612

D. Leenaerts

引用次数: 8

Evolution of low power electronics and its future applications 低功耗电子技术的发展及其未来应用

Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03. Pub Date : 2003-08-25 DOI: 10.1145/871506.871509

T. Makimoto, Y. Sakai

引用次数: 27

Analyzing the energy consumption of security protocols 安全协议能耗分析

Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03. Pub Date : 2003-08-25 DOI: 10.1145/871506.871518

N. R. Potlapally, S. Ravi, A. Raghunathan, N. Jha

{"title":"Analyzing the energy consumption of security protocols","authors":"N. R. Potlapally, S. Ravi, A. Raghunathan, N. Jha","doi":"10.1145/871506.871518","DOIUrl":"https://doi.org/10.1145/871506.871518","url":null,"abstract":"Security is critical to a wide range of wireless data applications and services. While several security mechanisms and protocols have been developed in the context of the wired Internet, many new challenges arise due to the unique characteristics of battery powered embedded systems. In this work, we focus on an important constraint of such devices - battery life - and examine how it is impacted by the use of security protocols. We present a comprehensive analysis of the energy requirements of a wide range of cryptographic algorithms that are used as building blocks in security protocols. Furthermore, we study the energy consumption requirements of the most popular transport-layer security protocol SSL (Secure Sockets Layer). To our knowledge, this is the first comprehensive analysis of the energy requirements of SSL. For our studies, we have developed a measurement-based experimental testbed that consists of an iPAQ PDA connected to a wireless LAN and running Linux, a PC-based data acquisition system for real-time current measurement, the OpenSSL implementation of the SSL protocol, and parametrizable SSL client and server test programs. We investigate the impact of various parameters at protocol level (such as cipher suites, authentication mechanisms, transaction sizes, etc.) and cryptographic algorithm level (cipher modes, strength) on overall energy consumption for secure data transactions. Based on our results, we discuss various opportunities for realizing energy-efficient implementations of security protocols. We believe such investigations to be an important first step towards addressing the challenges of energy efficient security for battery-constrained systems.","PeriodicalId":355883,"journal":{"name":"Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03.","volume":"123 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-08-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116931432","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 313

Low power startup circuits for voltage and current reference with zero steady state current 低功耗启动电路的电压和电流基准与零稳态电流

Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03. Pub Date : 2003-08-25 DOI: 10.1109/LPE.2003.1231859

Q. Khan, S. Wadhwa, K. Misri

引用次数: 36

Microarchitecture level power and thermal simulation considering temperature dependent leakage model 考虑温度相关泄漏模型的微架构级功率和热仿真

Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03. Pub Date : 2003-08-25 DOI: 10.1145/871506.871560

W. Liao, Fei Li, Lei He

引用次数: 58