2011 International Symposium on Electronic System Design最新文献

Optimizing Test Architecture for TSV Based 3D Stacked ICs Using Hard SOCs 基于硬soc的TSV 3D堆叠ic测试架构优化

2011 International Symposium on Electronic System Design Pub Date : 2011-12-19 DOI: 10.1109/ISED.2011.29

S. Roy, C. Giri, A. Chakraborty, Subhro Mukherjee, D. K. Das, H. Rahaman

引用次数: 2

Runtime Congestion and Crosstalk Aware Router for FPGA Using Jbits3.0 for Partial Reconfigurable Application 基于Jbits3.0的FPGA运行时拥塞和串扰感知路由器

2011 International Symposium on Electronic System Design Pub Date : 2011-12-19 DOI: 10.1109/ISED.2011.16

N. Das, P. Roy, H. Rahaman

引用次数: 3

An Efficient Method for Using Transaction Level Assertions in a Class Based Verification Environment 在基于类的验证环境中使用事务级断言的有效方法

2011 International Symposium on Electronic System Design Pub Date : 2011-12-19 DOI: 10.1109/ISED.2011.32

Naveen Sudhish, B. Raghavendra, Harish Yagain

引用次数: 8

Instruction Scheduling on Variable Latency Functional Units of VLIW Processors VLIW处理器可变延迟功能单元的指令调度

2011 International Symposium on Electronic System Design Pub Date : 2011-12-19 DOI: 10.1109/ISED.2011.50

Nayan V. Mujadiya

引用次数: 16

Image Authentication Using Hough Transform Generated Self Signature in DCT Based Frequency Domain (IAHTSSDCT) 基于DCT频域的Hough变换自签名图像认证(IAHTSSDCT)

2011 International Symposium on Electronic System Design Pub Date : 2011-12-19 DOI: 10.1109/ISED.2011.43

M. Sengupta, J. K. Mandal

引用次数: 4

A Novel Technique for Secret Communication through Optimal Shares Using Visual Cryptography (SCOSVC) 基于视觉密码(SCOSVC)的最优共享秘密通信新技术

2011 International Symposium on Electronic System Design Pub Date : 2011-12-19 DOI: 10.1109/ISED.2011.49

J. K. Mandal, S. Ghatak

引用次数: 10

A Message Embedded Authentication of Songs to Verify Intellectual Property Right (MEAS) 基于信息嵌入的歌曲知识产权认证(MEAS)

2011 International Symposium on Electronic System Design Pub Date : 2011-12-19 DOI: 10.1109/ISED.2011.44

U. K. Mondal, J. K. Mandal

引用次数: 1

A Best Path Selection Based Parallel Router for DMFBs 基于最佳路径选择的dmfb并行路由器

2011 International Symposium on Electronic System Design Pub Date : 2011-12-19 DOI: 10.1109/ISED.2011.33

P. Roy, H. Rahaman, Rupam Bhattacharya, P. Dasgupta

{"title":"A Best Path Selection Based Parallel Router for DMFBs","authors":"P. Roy, H. Rahaman, Rupam Bhattacharya, P. Dasgupta","doi":"10.1109/ISED.2011.33","DOIUrl":"https://doi.org/10.1109/ISED.2011.33","url":null,"abstract":"Recent advances in the design of digital micro fluidic based biochips have revolutionized the area of biochemical analysis especially for low-cost, portable, and disposable devices targeted towards clinical diagnostics applications. A promising category of micro fluidic biochips relies on the principle of electro wetting-on-dielectric, whereby discrete droplets of nanoliter volumes can be manipulated using an array of electrodes. This emerging technology combines electronics with biology to open new application areas such as point-of-care diagnosis, on-chip DNA analysis, and automated drug discovery. With the rapid advancement in micro fluidic and micro fabrication technology the complexity of design is expected to increase enormously as the number of concurrent application of assays in a single device increases significantly. One of the major CAD issues in this area is the concurrent routing of droplets in the design of DMFBs. The objective of droplet routing is to schedule the movement of a number of droplets in a time multiplexed manner to avoid their cross contamination. In this paper we attempted to resolve this problem using a line probe based algorithm to estimate all possible routing paths for each droplets. Thereby we used a graph based model to select the most suitable path for each droplet in the context of collision avoidance, minimization of stalling and optimized utilization of resources. The algorithm guided with problem specific heuristics has been tested with a number of standard test benches and the experimental results obtained so far indicate encouraging developments.","PeriodicalId":349073,"journal":{"name":"2011 International Symposium on Electronic System Design","volume":"171 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116132392","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 5

A Novel 14-Transistors Low-Power High-Speed PPM Adder 一种新型14晶体管低功耗高速PPM加法器

2011 International Symposium on Electronic System Design Pub Date : 2011-12-19 DOI: 10.1109/ISED.2011.19

Ramracksha Tripathi, Shivshankar Mishra, S. Prakash

引用次数: 3

System on Chip Implementation of Adaptive Moving Average Based Multiple-Model Kalman Filter for Denoising Fiber Optic Gyroscope Signal 基于自适应移动平均的多模型卡尔曼滤波对光纤陀螺信号去噪的片上系统实现

2011 International Symposium on Electronic System Design Pub Date : 2011-12-19 DOI: 10.1109/ISED.2011.61

P. KarthikK., P. Rangababu, S. L. Sabat, J. Nayak

引用次数: 10